[Intel-gfx] [PATCH 14/14] drm/i915: Reinit display irqs and hpd from chv pipe-a power well

[Paulo Zanoni]

2014-10-30 15:43 GMT-02:00  <ville.syrjala at linux.intel.com>:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> On chv the pipe-a power well is the new disp2d well, and it kills pretty
> much everything in the display block. So we need to do the the same
> dance that vlv does wrt. display irqs and hpd when the power well goes
> up or down.

I don't have the docs for this, so I have to ask: does it kill *all*
the interrupt bits (like VLV), or does it kill only the pipe A
interrupt bits (like BDW on pipes B/C)?

If it kills everything: Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>

>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_runtime_pm.c | 23 +++++++++++++++++++++++
>  1 file changed, 23 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index dcbecff..f5a78d5 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -577,6 +577,23 @@ static void chv_pipe_power_well_enable(struct drm_i915_private *dev_priv,
>                      power_well->data != PIPE_C);
>
>         chv_set_pipe_power_well(dev_priv, power_well, true);
> +
> +       if (power_well->data == PIPE_A) {
> +               spin_lock_irq(&dev_priv->irq_lock);
> +               valleyview_enable_display_irqs(dev_priv);
> +               spin_unlock_irq(&dev_priv->irq_lock);
> +
> +               /*
> +                * During driver initialization/resume we can avoid restoring the
> +                * part of the HW/SW state that will be inited anyway explicitly.
> +                */
> +               if (dev_priv->power_domains.initializing)
> +                       return;
> +
> +               intel_hpd_init(dev_priv);
> +
> +               i915_redisable_vga_power_on(dev_priv->dev);
> +       }
>  }
>
>  static void chv_pipe_power_well_disable(struct drm_i915_private *dev_priv,
> @@ -586,6 +603,12 @@ static void chv_pipe_power_well_disable(struct drm_i915_private *dev_priv,
>                      power_well->data != PIPE_B &&
>                      power_well->data != PIPE_C);
>
> +       if (power_well->data == PIPE_A) {
> +               spin_lock_irq(&dev_priv->irq_lock);
> +               valleyview_disable_display_irqs(dev_priv);
> +               spin_unlock_irq(&dev_priv->irq_lock);
> +       }
> +
>         chv_set_pipe_power_well(dev_priv, power_well, false);
>
>         if (power_well->data == PIPE_A)
> --
> 2.0.4
>
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-- 
Paulo Zanoni