[Intel-gfx] [PATCH 4/5] drm/i915: Warn if GPLL isn't used on vlv/chv

[Deepak S]

On Saturday 08 November 2014 01:03 AM, ville.syrjala at linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> Our freq<->opcode conversions assume that GPLL is always used.
> Apparently that should be the case always, but let's scream if we
> ever encounter something different.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
>   drivers/gpu/drm/i915/intel_pm.c | 6 ++++++
>   1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 71eb377..e8a6f92 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -5397,6 +5397,9 @@ static void cherryview_enable_rps(struct drm_device *dev)
>   
>   	val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
>   
> +	/* RPS code assumes GPLL is used */
> +	WARN_ONCE((val & GPLLENABLE) == 0, "GPLL not enabled\n");
> +
>   	DRM_DEBUG_DRIVER("GPLL enabled? %s\n", val & GPLLENABLE ? "yes" : "no");
>   	DRM_DEBUG_DRIVER("GPU status: 0x%08x\n", val);
>   
> @@ -5477,6 +5480,9 @@ static void valleyview_enable_rps(struct drm_device *dev)
>   
>   	val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
>   
> +	/* RPS code assumes GPLL is used */
> +	WARN_ONCE((val & GPLLENABLE) == 0, "GPLL not enabled\n");
> +
>   	DRM_DEBUG_DRIVER("GPLL enabled? %s\n", val & GPLLENABLE ? "yes" : "no");
>   	DRM_DEBUG_DRIVER("GPU status: 0x%08x\n", val);
>   

Yup better to give warning if our assumption is wrong:)

Reviewed-by: Deepak S <deepak.s at linux.intel.com>