[Intel-gfx] [PATCH 01/18] drm/i915: Return more precise cdclk for gen2/3

[Ville Syrjälä]

On Mon, Nov 17, 2014 at 07:44:30PM +0100, Daniel Vetter wrote:
> On Mon, Nov 17, 2014 at 04:43:35PM +0200, ville.syrjala at linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > 
> > Fill out the lower three digits for gen2 and gen3 cdclk frqeuncy. It's
> > not clear if these are accurate frquencies or just in the ballpark, but
> > without docs this is the best we can do.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> Given that no one complained yet I'm not sure this is worth the trouble.
> Otoh it's all below the 10% margin we have already anyway, so one big
> wash ;-)

Yeah <1Mhz is a fairly small error here. But I still prefer to make the
change, if only for consistency. Otherwise it'll keep bugging me and
I'll have to keep fighting the urge to change it every time I see those
numbers.

-- 
Ville Syrjälä
Intel OTC