[Intel-gfx] [PATCH 0/8] sanitize RPS interrupt enabling/disabling

Paulo Zanoni przanoni at gmail.com
Tue Nov 18 17:04:39 CET 2014


2014-11-05 16:48 GMT-02:00 Imre Deak <imre.deak at intel.com>:
> While fixing [1] I noticed that we can simplify a couple of things in
> the RPS enabling/disabling code. So I did that and also fixed one WARN
> that we can hit with some of the pm_rpm subtests. Hopefully these
> changes also makes it clearer how we avoid the race during RPS interrupt
> disabling and makes it less fragile (see the comment in patch 7/8).
>
> [1] https://bugs.freedesktop.org/show_bug.cgi?id=82939
>
> Imre Deak (8):
>   drm/i915: unify gen6/gen8 pm irq helpers
>   drm/i915: unify gen6/gen8 rps irq handler
>   drm/i915: unify gen6/gen8 rps irq enable/disable
>   drm/i915: move rps irq enable/disable to i915_irq.c
>   drm/i915: move rps irq disable one level up
>   drm/i915: sanitize rps irq enabling
>   drm/i915: sanitize rps irq disabling
>   drm/i915: disable rps irqs earlier during suspend/unload

With or without my bikesheds, feel free to add "Reviewed-by: Paulo
Zanoni <paulo.r.zanoni at intel.com>" to:
- new versions of patches 5, 6, and 7
- patch 8

Although it would be nice to see those "gen != 9" replaced with "gen <
9", but maybe Daniel can do this.

>
>  drivers/gpu/drm/i915/i915_drv.c      |   9 +--
>  drivers/gpu/drm/i915/i915_drv.h      |   6 +-
>  drivers/gpu/drm/i915/i915_irq.c      | 122 +++++++++++++++++++----------------
>  drivers/gpu/drm/i915/intel_display.c |   6 +-
>  drivers/gpu/drm/i915/intel_drv.h     |   5 +-
>  drivers/gpu/drm/i915/intel_pm.c      |  90 +++-----------------------
>  6 files changed, 90 insertions(+), 148 deletions(-)
>
> --
> 1.8.4
>
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-- 
Paulo Zanoni



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