[Intel-gfx] [PATCH] drm/i915: Pin tiled objects for L-shaped configs
Chris Wilson
chris at chris-wilson.co.uk
Thu Nov 20 10:32:37 CET 2014
On Thu, Nov 20, 2014 at 10:22:42AM +0100, Daniel Vetter wrote:
> On Thu, Nov 20, 2014 at 08:37:36AM +0000, Chris Wilson wrote:
> > Oh, one more request: can I haz decoded quirks in the error state?
>
> Hm, I haven't ever yet wanted to see them. Not even sure whether this
> might be useful here really ...
Here, I think just logging obj->pages_pin_count would answer some
worries. At the moment our quirks concern interaction with the display
hardware (backlight, PIPEA, ssc), if we start adding more that are
focused on memory management or GPU interaction, then we will went to
see the quirk list.
Thinking of which, there are quite a few cache/execution mode registers
we should be dumping upon error.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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