[Intel-gfx] [PATCH 2/5] drm/i915: Fix GMBUSFREQ on vlv/chv

Jani Nikula jani.nikula at linux.intel.com
Fri Oct 17 10:59:36 CEST 2014


On Thu, 16 Oct 2014, ville.syrjala at linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> vlv_cdclk_freq is in kHz but we need MHz for the GMBUSFREQ divider.
>
> This is a regression from:
>  commit f8bf63fdcb1f82459dae7a3f22ee5ce92f3ea727
>  Author: Ville Syrjälä <ville.syrjala at linux.intel.com>
>  Date:   Fri Jun 13 13:37:54 2014 +0300
>
>     drm/i915: Kill duplicated cdclk readout code from i2c
>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula at intel.com>


> ---
>  drivers/gpu/drm/i915/intel_display.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 6e6f150..18b493f 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -4628,7 +4628,7 @@ static void vlv_update_cdclk(struct drm_device *dev)
>  	 * BSpec erroneously claims we should aim for 4MHz, but
>  	 * in fact 1MHz is the correct frequency.
>  	 */
> -	I915_WRITE(GMBUSFREQ_VLV, dev_priv->vlv_cdclk_freq);
> +	I915_WRITE(GMBUSFREQ_VLV, DIV_ROUND_UP(dev_priv->vlv_cdclk_freq, 1000));
>  }
>  
>  /* Adjust CDclk dividers to allow high res or save power if possible */
> -- 
> 2.0.4
>
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-- 
Jani Nikula, Intel Open Source Technology Center



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