[Intel-gfx] [PATCH 2/2] drm/i915: spt does not have pch backlight override bit
Ville Syrjälä
ville.syrjala at linux.intel.com
Mon Oct 20 13:28:48 CEST 2014
On Fri, Oct 10, 2014 at 05:53:33PM +0300, Jani Nikula wrote:
> SPT is always in the PCH override mode, and the bit MBZ. Only set
> override on LPT.
>
> v2: check for PCH version (Ville)
>
> Signed-off-by: Jani Nikula <jani.nikula at intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_panel.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
> index e3def5ad4a77..e18b3f49074c 100644
> --- a/drivers/gpu/drm/i915/intel_panel.c
> +++ b/drivers/gpu/drm/i915/intel_panel.c
> @@ -775,8 +775,9 @@ static void bdw_enable_backlight(struct intel_connector *connector)
> if (panel->backlight.active_low_pwm)
> pch_ctl1 |= BLM_PCH_POLARITY;
>
> - /* BDW always uses the pch pwm controls. */
> - pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
> + /* After LPT, override is the default. */
> + if (HAS_PCH_LPT(dev_priv))
> + pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
>
> I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
> POSTING_READ(BLC_PWM_PCH_CTL1);
> --
> 2.1.0
>
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--
Ville Syrjälä
Intel OTC
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