[Intel-gfx] [RFC v2 0/7] Rearranging PPS related code
Vandana Kannan
vandana.kannan at intel.com
Mon Oct 20 14:50:02 CEST 2014
Since panel power sequencing is a feature common to all internal displays,
moving relevant code to intel_panel.c. This patch series contains changes
to setup PPS data and program register values as required.
The implementation follows the model used for backlight funcs
(as suggested by Daniel) which splits the changes based on platform.
As of now, changes have been made considering only eDP.
TODO:-
1. Accomodate software delays where applicable.
2. Integrate MIPI PPS delays once 1. is done.
3. PPS delays would be required for LVDS as well. The existing file
intel_lvds.c does not make use of the delays.
v2: Splitting the patches per function and then splitting the functions per
platform.
Vandana Kannan (7):
drm/i915: Move around funcs related to eDP PPS
drm/i915: Setup PPS in intel_panel
drm/i915: Split PPS setup code based on platform
drm/i915: Program PPS registers
drm/i915: Split PPS reg write func based on platform
drm/i915: Replace all refs to intel_dp delays
drm/i915: Modify refs to intel dp timestamps
drivers/gpu/drm/i915/i915_drv.h | 7 +
drivers/gpu/drm/i915/intel_display.c | 1 +
drivers/gpu/drm/i915/intel_dp.c | 266 +++++------------------------------
drivers/gpu/drm/i915/intel_drv.h | 30 ++--
drivers/gpu/drm/i915/intel_panel.c | 258 +++++++++++++++++++++++++++++++++
5 files changed, 324 insertions(+), 238 deletions(-)
--
2.0.1
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