[Intel-gfx] [RFC 4/7] drm/i915: Program PPS registers
Daniel Vetter
daniel at ffwll.ch
Mon Oct 20 18:08:48 CEST 2014
On Mon, Oct 20, 2014 at 06:20:06PM +0530, Vandana Kannan wrote:
> Actually set values into PPS related registers. This implementation is
> equivalent to intel_dp_panel_power_sequencer_registers where the values
> saved intially are written into registers.
>
> Signed-off-by: Vandana Kannan <vandana.kannan at intel.com>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 80 ++------------------------------------
> drivers/gpu/drm/i915/intel_drv.h | 3 ++
> drivers/gpu/drm/i915/intel_panel.c | 70 +++++++++++++++++++++++++++++++++
> 3 files changed, 76 insertions(+), 77 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index a433c5f..ca11eb1 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -248,7 +248,7 @@ unpack_aux(uint32_t src, uint8_t *dst, int dst_bytes)
> }
>
> /* hrawclock is 1/4 the FSB frequency */
> -static int
> +int
> intel_hrawclk(struct drm_device *dev)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
> @@ -281,11 +281,6 @@ intel_hrawclk(struct drm_device *dev)
> }
> }
>
> -static void
> -intel_dp_init_panel_power_sequencer_registers(struct drm_device *dev,
> - struct intel_dp *intel_dp,
> - struct edp_power_seq *out);
> -
> static void pps_lock(struct intel_dp *intel_dp)
> {
> struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> @@ -4716,76 +4711,6 @@ static void intel_dp_init_panel_power_timestamps(struct intel_dp *intel_dp)
> intel_dp->last_backlight_off = jiffies;
> }
>
> -static void
> -intel_dp_init_panel_power_sequencer_registers(struct drm_device *dev,
> - struct intel_dp *intel_dp,
> - struct edp_power_seq *seq)
Hm, moving this function looks like it would be clearer as part of patch
1?
Otherwise I've done a (very) quick read-through of your series and on a
high level it looks sane I think. So please sign someone up for the
detailed review (and make sure that person is aware of that AR) so I can
merge this.
Thanks, Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
More information about the Intel-gfx
mailing list