[Intel-gfx] [PATCH v4] drm/i915: Add ppgtt create/release trace points

[Daniel Vetter]

On Wed, Oct 22, 2014 at 02:28:45PM +0100, daniele.ceraolospurio at intel.com wrote:
> From: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> 
> These tracepoints are useful for observing the creation and
> destruction of Full PPGTTs.
> 
> v4: add DOC information
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gem_gtt.c |  4 +++
>  drivers/gpu/drm/i915/i915_trace.h   | 58 +++++++++++++++++++++++++++++++++++++
>  2 files changed, 62 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index e0bcba0..ed9ec67 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -1174,6 +1174,8 @@ i915_ppgtt_create(struct drm_device *dev, struct drm_i915_file_private *fpriv)
>  
>  	ppgtt->file_priv = fpriv;
>  
> +	trace_i915_ppgtt_create(&ppgtt->base);
> +
>  	return ppgtt;
>  }
>  
> @@ -1182,6 +1184,8 @@ void  i915_ppgtt_release(struct kref *kref)
>  	struct i915_hw_ppgtt *ppgtt =
>  		container_of(kref, struct i915_hw_ppgtt, ref);
>  
> +	trace_i915_ppgtt_release(&ppgtt->base);
> +
>  	/* vmas should already be unbound */
>  	WARN_ON(!list_empty(&ppgtt->base.active_list));
>  	WARN_ON(!list_empty(&ppgtt->base.inactive_list));
> diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
> index f5aa006..6cf5ca2 100644
> --- a/drivers/gpu/drm/i915/i915_trace.h
> +++ b/drivers/gpu/drm/i915/i915_trace.h
> @@ -15,6 +15,14 @@
>  #define TRACE_SYSTEM_STRING __stringify(TRACE_SYSTEM)
>  #define TRACE_INCLUDE_FILE i915_trace
>  
> +/**
> + * DOC: i915 tracepoints
> + *
> + * This file has the fancy tracepoints available in the drm/i915 driver.
> + * I encourage people to update theirs!

I think we cand drop this part, but to make these DOC sections really
useful you also need to pull them into a new "Tracing" section in the i915
part of the drm DocBook. See Documentation/DocBook/drm.tmpl and lock at
the recent commits from i915 people for examples.
-Daniel

> + *
> + */
> +
>  /* pipe updates */
>  
>  TRACE_EVENT(i915_pipe_update_start,
> @@ -587,6 +595,56 @@ TRACE_EVENT(intel_gpu_freq_change,
>  	    TP_printk("new_freq=%u", __entry->freq)
>  );
>  
> +/**
> + * DOC: i915_ppgtt_create and i915_ppgtt_release tracepoints
> + *
> + * With full ppgtt enabled each process using drm will allocate at least one
> + * translation table. With these traces it is possible to keep track of the
> + * allocation and of the lifetime of the tables; this can be used during
> + * testing/debug to verify that we are not leaking ppgtts.
> + * These traces identify the ppgtt through the vm pointer, which is also printed
> + * by the i915_vma_bind and i915_vma_unbind tracepoints.
> + */
> +TRACE_EVENT(i915_ppgtt_create,
> +	TP_PROTO(struct i915_address_space *vm),
> +
> +	TP_ARGS(vm),
> +
> +	TP_STRUCT__entry(
> +			__field(struct i915_address_space *, vm)
> +			__field(u32, dev)
> +			__field(int, pid)
> +	),
> +
> +	TP_fast_assign(
> +			__entry->vm = vm;
> +			__entry->dev = vm->dev->primary->index;
> +			__entry->pid = (int)task_pid_nr(current);
> +	),
> +
> +	TP_printk("dev=%u, task_pid=%d, vm=%p",
> +		  __entry->dev, __entry->pid, __entry->vm)
> +);
> +
> +TRACE_EVENT(i915_ppgtt_release,
> +
> +	TP_PROTO(struct i915_address_space *vm),
> +
> +	TP_ARGS(vm),
> +
> +	TP_STRUCT__entry(
> +			__field(struct i915_address_space *, vm)
> +			__field(u32, dev)
> +	),
> +
> +	TP_fast_assign(
> +		__entry->vm = vm;
> +		__entry->dev = vm->dev->primary->index;
> +	),
> +
> +	TP_printk("dev=%u, vm=%p", __entry->dev, __entry->vm)
> +);
> +
>  #endif /* _I915_TRACE_H_ */
>  
>  /* This part must be outside protection */
> -- 
> 1.8.5.2
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch