[Intel-gfx] [PATCH] drm/i915: Support to create uncached user mapping for a Gem object

Chris Wilson chris at chris-wilson.co.uk
Thu Oct 23 13:56:46 CEST 2014


On Thu, Oct 23, 2014 at 04:03:56PM +0530, akash.goel at intel.com wrote:
> From: Akash Goel <akash.goel at intel.com>
> 

> This is for improving the CPU write operation performance, as with such
> mapping, writes are almost 50% faster than with mmap_gtt. Also it avoids the

I doubt it is the actual write that is faster. For example,

   gtt       wc    Operation
--------  ------   ---------
424000.0    1.30   ShmPutImage 10x10 square 
 29500.0    1.42   ShmPutImage 100x100 square 
  1510.0    0.95   ShmPutImage 500x500 square 

It seems to reduce the overhead for small transfers (with an already
mmaped pointer). That's interesting certainly, and probably a Clue for
further improving performance. But it looks like peak throughput is
limited by memory bandwidth, which has been my experience with the GTT
mmap thus far.

I have some doubts as to whether it is coherent with the display though,
and so whether it is truly write-combining...
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre



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