[Intel-gfx] [PATCH v2 0/9] Stage shared dpll config

[Ander Conselvan de Oliveira]

Version 2 of the series with the comments I got so far resolved.

Ander Conselvan de Oliveira (9):
  drm/i915: Make *_crtc_mode_set work on new_config
  drm/i915: Convert shared dpll reference count to a crtc mask
  drm/i915: Move dpll crtc_mask and hw_state fields into separate struct
  drm/i915: Add infrastructure for choosing DPLLs before disabling crtcs
  drm/i915: Covert HSW+ to choose DPLLS before disabling CRTCs
  drm/i915: Covert ILK-IVB to choose DPLLS before disabling CRTCs
  drm/i915: Covert remaining platforms to choose DPLLS before disabling
    CRTCs
  drm/i915: Remove crtc_mode_set() hook
  drm/i915: Don't store current shared DPLL in the new pipe_config

 drivers/gpu/drm/i915/i915_debugfs.c  |  15 +-
 drivers/gpu/drm/i915/i915_drv.h      |  14 +-
 drivers/gpu/drm/i915/intel_ddi.c     |  36 +++-
 drivers/gpu/drm/i915/intel_display.c | 358 ++++++++++++++++++++++-------------
 4 files changed, 272 insertions(+), 151 deletions(-)

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1.9.1