[Intel-gfx] [PATCH 13/14] drm/i915: Use vlv display irq setup code for chv
Ville Syrjälä
ville.syrjala at linux.intel.com
Fri Oct 31 11:04:15 CET 2014
On Thu, Oct 30, 2014 at 06:41:11PM -0200, Paulo Zanoni wrote:
> 2014-10-30 15:43 GMT-02:00 <ville.syrjala at linux.intel.com>:
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> >
> > Throw away the hand rolled display irq setup code on chv, and instead
> > just call vlv_display_irq_postinstall() and vlv_display_irq_uninstall().
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_irq.c | 37 ++-----------------------------------
> > 1 file changed, 2 insertions(+), 35 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> > index 628a129..722f73c 100644
> > --- a/drivers/gpu/drm/i915/i915_irq.c
> > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > @@ -3540,34 +3540,8 @@ static int gen8_irq_postinstall(struct drm_device *dev)
> > static int cherryview_irq_postinstall(struct drm_device *dev)
> > {
> > struct drm_i915_private *dev_priv = dev->dev_private;
> > - u32 enable_mask = I915_DISPLAY_PORT_INTERRUPT |
> > - I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
> > - I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
> > - I915_DISPLAY_PIPE_C_EVENT_INTERRUPT;
> > - u32 pipestat_enable = PLANE_FLIP_DONE_INT_STATUS_VLV |
> > - PIPE_CRC_DONE_INTERRUPT_STATUS;
> > - int pipe;
> > -
> > - /*
> > - * Leave vblank interrupts masked initially. enable/disable will
> > - * toggle them based on usage.
> > - */
> > - dev_priv->irq_mask = ~enable_mask;
> > -
> > - for_each_pipe(dev_priv, pipe)
> > - I915_WRITE(PIPESTAT(pipe), 0xffff);
> > -
> > - spin_lock_irq(&dev_priv->irq_lock);
> > - i915_enable_pipestat(dev_priv, PIPE_A, PIPE_GMBUS_INTERRUPT_STATUS);
> > - for_each_pipe(dev_priv, pipe)
> > - i915_enable_pipestat(dev_priv, pipe, pipestat_enable);
> > - spin_unlock_irq(&dev_priv->irq_lock);
> >
> > - I915_WRITE(VLV_IIR, 0xffffffff);
> > - I915_WRITE(VLV_IIR, 0xffffffff);
> > - I915_WRITE(VLV_IER, enable_mask);
> > - I915_WRITE(VLV_IMR, dev_priv->irq_mask);
> > - POSTING_READ(VLV_IMR);
> > + vlv_display_irq_postinstall(dev_priv);
>
> This chunk changes the order of stuff a little bit, but seems mostly
> equivalent. I'll consider it's ok.
>
> >
> > gen8_gt_irq_postinstall(dev_priv);
> >
> > @@ -3620,7 +3594,6 @@ static void valleyview_irq_uninstall(struct drm_device *dev)
> > static void cherryview_irq_uninstall(struct drm_device *dev)
> > {
> > struct drm_i915_private *dev_priv = dev->dev_private;
> > - int pipe;
> >
> > if (!dev_priv)
> > return;
> > @@ -3632,13 +3605,7 @@ static void cherryview_irq_uninstall(struct drm_device *dev)
> >
> > GEN5_IRQ_RESET(GEN8_PCU_);
> >
> > - I915_WRITE(PORT_HOTPLUG_EN, 0);
> > - I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
> > -
> > - for_each_pipe(dev_priv, pipe)
> > - I915_WRITE(PIPESTAT(pipe), 0xffff);
> > -
> > - GEN5_IRQ_RESET(VLV_);
> > + vlv_display_irq_uninstall(dev_priv);
>
> The perfect match for the code you removed seems to be
> vlv_display_irq_reset(). Why use vlv_display_irq_uninstall() instead?
Becasue vlv uses it too :) I suppose the idea is to disable the
interrupts the same way they got enabled for symmetry. So if the display
interrupts got enabled by valleyview_display_irqs_install() we should
uninstall them using valleyview_display_irqs_uninstall(). And also
irq_mask gets zeroed there to accurately reflect the state of the
VLV_IER/IMR registers. But yeah we could just call
vlv_display_irq_reset() and get the same hardware effect.
I'm actually thinking we should drop the .irq_preinstall() call from
intel_runtime_pm_enable_interrupts() since IIRC we don't even
unregister the irq handler itself there, and then add a bit of
irq_mask and whatnot sanity checking to .irq_postinstall().
>
> > }
> >
> > static void ironlake_irq_uninstall(struct drm_device *dev)
> > --
> > 2.0.4
> >
> > _______________________________________________
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> > Intel-gfx at lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>
>
> --
> Paulo Zanoni
--
Ville Syrjälä
Intel OTC
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