[Intel-gfx] [PATCH v2] drm/i915: Rework workaround init functions for BDW and CHV

[Damien Lespiau]

On Tue, Sep 02, 2014 at 10:45:45AM +0100, Damien Lespiau wrote:
> There's one case when this won't work, when several WAs for a single
> 'normal' register are defined. The read done here means only the last of
> those W/As will end up being applied (because the last LRI to that
> register will be the value that ends up in the register. We'll probably
> need to coalesce all W/A defined for a single normal register into one
> write.

To more correct/clear, it's not the read that's the problem, in the case
where a normal register has several W/A, the last write will override
the previous ones.

-- 
Damien