[Intel-gfx] [PATCH] drm/i915: Limit the watermark to at least 8 entries on gen2/3

[Thomas Richter]

Am 08.09.2014 09:39, schrieb Daniel Vetter:
> On Fri, Sep 05, 2014 at 09:54:13PM +0300, ville.syrjala at linux.intel.com wrote:
>> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>>
>> 830 is very unhappy of the watermark value is too low (indicating a very
>> high watermark in fact, ie. memory fetch will occur with an almost full
>> FIFO). Limit the watermark value to at least 8 cache lines.
>>
>> That also matches the burst size we use on most platforms. BSpec seems
>> to indicate we should limit the watermark to 'burst size + 1'. But on
>> gen4 we already use a hardcoded 8 as the watermark value (as the spec
>> says we should), so just use 8 as the limit on gen2/3 as well.
>>
>> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> Queued for -next, thanks for the patch. And since this goes in through
> -next the potential risk to other platforms is imo manageable. And we've
> had other people complaint about serious underrun troubles on e.g.
> underpowered i915gm atoms with big screens. Maybe this helps there like
> for the i830m.

Thanks, I'll give -next a spin on my 830 and 945 based machines. I don't 
think I have a 845 here, though.

Greetings,
	Thomas