[Intel-gfx] [PATCH] drm/i915: Enable full PPGTT on gen7

[Thierry, Michel]

On Tue, Sep 9, 2014 at 1:34 PM, Ville Syrjälä
<ville.syrjala at linux.intel.com> wrote: 
> On Tue, Sep 09, 2014 at 12:57:11PM +0100, Chris Wilson wrote:
> > On Fri, Sep 05, 2014 at 02:13:16PM +0100, Michel Thierry wrote:
> > > Use full PPGTT as the default option in gen7.
> > > Note that aliasing PPGTT is the default option for gen8 (see
HAS_PPGTT).
> > >
> > > This may well come back to bite me later.
> >
> > Indeed. So something I spotted was that bspec mentions that the per-ring
> > PDE registers (RING_PP_DIR_DCLV and RING_PP_DIR_BASE) are stored in
> the
> > logical context and so the registers are restored along with the
> > context. If this is correct what happens when we switch logical contexts
> > on RCS whilst we have active work on BCS etc? Does this mean that we
> > have to serialise context switches across rings, or is my reading of the
> > bspec false?
> 
> How does rcs PP_DIR_* affect bcs? Also IIRC that stuff is part of
> the execlist context which isn't saved/restored unless execlists
> are actually enabled. IIRC when I tried it, snb did reserve the
> space for that stuff in the context image but didn't save/restore
> it, but ivb+ didn't even reserve the space.
> 
Yes, my understanding is that these registers are per engine, and bcs
couldn't be affected by rcs.  

-Michel
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