[Intel-gfx] [PATCH] drm/i915/ppgtt: Load address space after mi_set_context

[Ville Syrjälä]

On Fri, Sep 12, 2014 at 05:56:30PM +0100, Michel Thierry wrote:
> On 9/12/2014 4:40 PM, Chris Wilson wrote:
> > On Fri, Sep 12, 2014 at 06:35:10PM +0300, Ville Syrjälä wrote:
> >> On Fri, Sep 12, 2014 at 04:10:01PM +0100, Michel Thierry wrote:
> >>> From: Ben Widawsky <benjamin.widawsky at intel.com>
> >>>
> >>> The simple explanation is, the docs say to do this for GEN8. Perhaps we
> >>> want to do this for GEN7 too, I am not certain.
> >>>
> >>> PDPs are saved and restored with context. Contexts (without execlists)
> >>> only exist on the render ring. The docs say that PDPs are not power
> >>> context save/restored.  I've learned that this actually means something
> >>> which SW doesn't care about. So pretend the statement doesn't exist.
> >>> For non RCS, nothing changes.
> >
> > Hang on. This is exactly what I was worried about... Which PDPs are
> > saved with context? Why doesn't this mean that we aren't overwitting
> > PDPs in use on other rings when RCS loads a new context?
> > -Chris
> >
> 
> I was wondering the same when I read Ben's original comment. Could this 
> be GEN8 specific?

Yes. For earlier hardware it's stated that the RCS PP_DIR registers are
saved in the power context when in ring buffer mode. For gen8 it's very
unclear from the docs.

If you look at the context image it shows the RCS PDPs in the execlist
context. But if it's saving the execlist context even in ring buffer
mode (which the earlier platforms didn't do) then it means that our
GEN8_CXT_TOTAL_SIZE is wrong since it doesn't include the execlist
context. I don't think anyone did for gen8 what I did for gen6/7
and actually look at the context after the hardware had saved it.
That's how I figured out which parts actually get saved.

As far as the other engines go, I think they must still save their
PDPs in some power context since the execlist context only contains
the RCS PDPs. Well, assuming the execlist context is really where
this stuff is saved for RCS.

-- 
Ville Syrjälä
Intel OTC