[Intel-gfx] [PATCH 1/2] drm/i915: Only flush fbc on sw when fbc is enabled.

[Paulo Zanoni]

2014-09-05 17:57 GMT-03:00 Rodrigo Vivi <rodrigo.vivi at intel.com>:
> Avoid touching fbc register when fbc is disabled.

Just a note: we avoid touching _one_ fbc register, but now we touch
another one to check if FBC is enabled. OTOH
we probably want to modify intel_fbc_enabled() to also not touch
registers (since we run it dozens and dozens of times per second, even
when FBC is disabled). So:

Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>

>
> Cc: Paulo Zanoni <paulo.r.zanoni at intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 45f71e6..c3d3439 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -352,6 +352,9 @@ void gen8_fbc_sw_flush(struct drm_device *dev, u32 value)
>         if (!IS_GEN8(dev))
>                 return;
>
> +       if (!intel_fbc_enabled(dev))
> +               return;
> +
>         I915_WRITE(MSG_FBC_REND_STATE, value);
>  }
>
> --
> 1.9.3
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Paulo Zanoni