[Intel-gfx] [PATCH 42/89] drm/i915/skl: Move gen9 pm initialization into its own branch
Rodrigo Vivi
rodrigo.vivi at gmail.com
Thu Sep 18 00:16:24 CEST 2014
Oh I think we should reorganize everything here now...
It got messy... Well it was messy anyway already...
not this patch's fault so:
Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
On Thu, Sep 4, 2014 at 4:27 AM, Damien Lespiau <damien.lespiau at intel.com>
wrote:
> Gen9 is different enough (for instance, fetching the memory latency
> values is different from ILK+) to not take the HAS_PCH_SPLIT() branch,
> so let's prefer a clean separation.
>
> v2: Rebase on top of the broadwell_init_clock_gating() name change
>
> Signed-off-by: Damien Lespiau <damien.lespiau at intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> index faff54e..a236e77 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -7395,7 +7395,9 @@ void intel_init_pm(struct drm_device *dev)
> i915_ironlake_get_mem_freq(dev);
>
> /* For FIFO watermark updates */
> - if (HAS_PCH_SPLIT(dev)) {
> + if (IS_GEN9(dev)) {
> + dev_priv->display.init_clock_gating =
> gen9_init_clock_gating;
> + } else if (HAS_PCH_SPLIT(dev)) {
> ilk_setup_wm_latency(dev);
>
> if ((IS_GEN5(dev) && dev_priv->wm.pri_latency[1] &&
> @@ -7419,8 +7421,6 @@ void intel_init_pm(struct drm_device *dev)
> dev_priv->display.init_clock_gating =
> haswell_init_clock_gating;
> else if (INTEL_INFO(dev)->gen == 8)
> dev_priv->display.init_clock_gating =
> broadwell_init_clock_gating;
> - else if (INTEL_INFO(dev)->gen == 9)
> - dev_priv->display.init_clock_gating =
> gen9_init_clock_gating;
> } else if (IS_CHERRYVIEW(dev)) {
> dev_priv->display.update_wm = cherryview_update_wm;
> dev_priv->display.update_sprite_wm =
> valleyview_update_sprite_wm;
> --
> 1.8.3.1
>
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>
--
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
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