[Intel-gfx] [PATCH 69/89] drm/i915/skl: Adding power domains for AUX controllers

[Damien Lespiau]

Hi Imre,

I actually had some question there as well:

On Tue, Sep 16, 2014 at 03:35:15PM +0300, Imre Deak wrote:
> > @@ -7685,24 +7689,32 @@ EXPORT_SYMBOL_GPL(i915_get_cdclk_freq);
> >  	BIT(POWER_DOMAIN_PORT_DDI_C_2_LANES) |	\
> >  	BIT(POWER_DOMAIN_PORT_DDI_C_4_LANES) |	\
> >  	BIT(POWER_DOMAIN_PORT_CRT) |		\
> > +	BIT(POWER_DOMAIN_AUX_A) |		\
> > +	BIT(POWER_DOMAIN_AUX_B) |		\
> > +	BIT(POWER_DOMAIN_AUX_C) |		\
> > +	BIT(POWER_DOMAIN_AUX_D) |		\
> >  	BIT(POWER_DOMAIN_INIT))

That's the VLV_DPIO_CMN_BC_POWER_DOMAINS, shouldn't we move AUX_A out of
this define?

Where does the port A lanes/aux should be on VLV and CHV, I don't see a
good fit nor where the POWER_DOMAIN_PORT_DDI_A_X_LANES is today

> >  #define VLV_DPIO_TX_B_LANES_01_POWER_DOMAINS (	\
> >  	BIT(POWER_DOMAIN_PORT_DDI_B_2_LANES) |	\
> >  	BIT(POWER_DOMAIN_PORT_DDI_B_4_LANES) |	\
> > +	BIT(POWER_DOMAIN_AUX_B) |		\
> >  	BIT(POWER_DOMAIN_INIT))
> >  
> >  #define VLV_DPIO_TX_B_LANES_23_POWER_DOMAINS (	\
> >  	BIT(POWER_DOMAIN_PORT_DDI_B_4_LANES) |	\
> > +	BIT(POWER_DOMAIN_AUX_B) |		\
> >  	BIT(POWER_DOMAIN_INIT))

Wouldn't it better to leave the AUX domain in the LANES_01 power domain,
otherwise we'll power up the full 4 lanes for aux transactions?

Thanks,

-- 
Damien