[Intel-gfx] [PATCH 8/8] drm/i915: Support alias ppgtt in VM if ppgtt is enabled

[Chris Wilson]

On Sat, Sep 20, 2014 at 02:47:08AM +0800, Jike Song wrote:
> From: Yu Zhang <yu.c.zhang at intel.com>
> 
> The current XenGT only supports alias ppgtt. And the emulation
> is done in XenGT host by first trapping PP_DIR_BASE mmio
> accesses. Updating PP_DIR_BASE by using instructions such as
> MI_LOAD_REGISTER_IMM are hard to emulate and are not supported
> in current XenGT. Therefore this patch also added a new callback
> routine - vgpu_mm_switch() to set the PP_DIR_BASE by mmio writes.
> 
> Signed-off-by: Yu Zhang <yu.c.zhang at intel.com>
> Signed-off-by: Jike Song <jike.song at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_dma.c     |  5 +++++
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 14 ++++++++++++++
>  2 files changed, 19 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index a3fe7c0..63dccd2 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -1746,6 +1746,11 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
>  		i915.enable_fbc = 0;
>  
>  		intel_vgpu_reg_write_init(dev);
> +
> +		if (USES_FULL_PPGTT(dev)) {
> +			DRM_INFO("Only support alias ppgtt for now in VM.\n");
> +			i915.enable_ppgtt = 1;
> +		}

This should be moved to sanitize_enable_ppgtt(), probably by expanding
HAS_PPGTT(), e.g.:

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 07dafa2c2d8c..b1fa13942d14 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2139,8 +2139,6 @@ struct drm_i915_cmd_table {
 
 #define HAS_HW_CONTEXTS(dev)   (INTEL_INFO(dev)->gen >= 6)
 #define HAS_LOGICAL_RING_CONTEXTS(dev) (INTEL_INFO(dev)->gen >= 8)
-#define HAS_ALIASING_PPGTT(dev)        (INTEL_INFO(dev)->gen >= 6)
-#define HAS_PPGTT(dev)         (INTEL_INFO(dev)->gen >= 7 && !IS_GEN8(dev))
 #define USES_PPGTT(dev)                (i915.enable_ppgtt)
 #define USES_FULL_PPGTT(dev)   (i915.enable_ppgtt == 2)
 
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index a234446a8678..3bea0bdfd276 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -35,13 +35,23 @@ static void chv_setup_private_ppat(struct drm_i915_private *dev_priv);
 
 static int sanitize_enable_ppgtt(struct drm_device *dev, int enable_ppgtt)
 {
-       if (enable_ppgtt == 0 || !HAS_ALIASING_PPGTT(dev))
+       bool has_aliasing_ppgtt;
+       bool has_full_ppgtt;
+
+       has_aliasing_ppgtt = INTEL_INFO(dev)->gen >= 6;
+       has_full_ppgtt = INTEL_INFO(dev)->gen >= 7;
+       if (IS_GEN8(dev))
+               has_full_ppgtt = false; /* XXX why? */
+       if (intel_vgpu_active(dev))
+               has_full_ppgtt = false; /* emulation is too hard */
+
+       if (enable_ppgtt == 0 || !has_aliasing_ppgtt)
                return 0;
 
        if (enable_ppgtt == 1)
                return 1;
 
-       if (enable_ppgtt == 2 && HAS_PPGTT(dev))
+       if (enable_ppgtt == 2 && has_full_ppgtt)
                return 2;
 
 #ifdef CONFIG_INTEL_IOMMU
@@ -59,7 +69,7 @@ static int sanitize_enable_ppgtt(struct drm_device *dev, int enable_ppgtt)
                return 0;
        }
 
-       return HAS_PPGTT(dev) ? 2 : HAS_ALIASING_PPGTT(dev) ? 1 : 0;
+       return has_full_ppgtt ? 2 : has_aliasing_ppgtt ? 1 : 0;
 }

-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre