[Intel-gfx] [PATCH 80/89] drm/i915/skl: Augment the latency debugfs files for SKL
Ville Syrjälä
ville.syrjala at linux.intel.com
Fri Sep 19 12:53:31 CEST 2014
On Thu, Sep 04, 2014 at 12:27:46PM +0100, Damien Lespiau wrote:
> Signed-off-by: Damien Lespiau <damien.lespiau at intel.com>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 76 ++++++++++++++++++++++++++++++-------
> 1 file changed, 62 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 02cb310..1520d1f 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -3499,7 +3499,7 @@ static const struct file_operations i915_display_crc_ctl_fops = {
> .write = display_crc_ctl_write
> };
>
> -static void wm_latency_show(struct seq_file *m, const uint16_t wm[5])
> +static void wm_latency_show(struct seq_file *m, const uint16_t wm[8])
> {
> struct drm_device *dev = m->private;
> int num_levels = ilk_wm_max_level(dev) + 1;
> @@ -3510,13 +3510,17 @@ static void wm_latency_show(struct seq_file *m, const uint16_t wm[5])
> for (level = 0; level < num_levels; level++) {
> unsigned int latency = wm[level];
>
> - /* WM1+ latency values in 0.5us units */
> - if (level > 0)
> + /*
> + * - WM1+ latency values in 0.5us units
> + * - latencies are in us on gen9
> + */
> + if (IS_GEN9(dev))
gen >= 9 here to perhaps?
Apart from that it looks ok to me.
Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> + latency *= 10;
> + else if (level > 0)
> latency *= 5;
>
> seq_printf(m, "WM%d %u (%u.%u usec)\n",
> - level, wm[level],
> - latency / 10, latency % 10);
> + level, wm[level], latency / 10, latency % 10);
> }
>
> drm_modeset_unlock_all(dev);
> @@ -3525,8 +3529,15 @@ static void wm_latency_show(struct seq_file *m, const uint16_t wm[5])
> static int pri_wm_latency_show(struct seq_file *m, void *data)
> {
> struct drm_device *dev = m->private;
> + struct drm_i915_private *dev_priv = dev->dev_private;
> + const uint16_t *latencies;
> +
> + if (INTEL_INFO(dev)->gen >= 9)
> + latencies = dev_priv->wm.skl_latency;
> + else
> + latencies = to_i915(dev)->wm.pri_latency;
>
> - wm_latency_show(m, to_i915(dev)->wm.pri_latency);
> + wm_latency_show(m, latencies);
>
> return 0;
> }
> @@ -3534,8 +3545,15 @@ static int pri_wm_latency_show(struct seq_file *m, void *data)
> static int spr_wm_latency_show(struct seq_file *m, void *data)
> {
> struct drm_device *dev = m->private;
> + struct drm_i915_private *dev_priv = dev->dev_private;
> + const uint16_t *latencies;
> +
> + if (INTEL_INFO(dev)->gen >= 9)
> + latencies = dev_priv->wm.skl_latency;
> + else
> + latencies = to_i915(dev)->wm.spr_latency;
>
> - wm_latency_show(m, to_i915(dev)->wm.spr_latency);
> + wm_latency_show(m, latencies);
>
> return 0;
> }
> @@ -3543,8 +3561,15 @@ static int spr_wm_latency_show(struct seq_file *m, void *data)
> static int cur_wm_latency_show(struct seq_file *m, void *data)
> {
> struct drm_device *dev = m->private;
> + struct drm_i915_private *dev_priv = dev->dev_private;
> + const uint16_t *latencies;
> +
> + if (INTEL_INFO(dev)->gen >= 9)
> + latencies = dev_priv->wm.skl_latency;
> + else
> + latencies = to_i915(dev)->wm.cur_latency;
>
> - wm_latency_show(m, to_i915(dev)->wm.cur_latency);
> + wm_latency_show(m, latencies);
>
> return 0;
> }
> @@ -3580,11 +3605,11 @@ static int cur_wm_latency_open(struct inode *inode, struct file *file)
> }
>
> static ssize_t wm_latency_write(struct file *file, const char __user *ubuf,
> - size_t len, loff_t *offp, uint16_t wm[5])
> + size_t len, loff_t *offp, uint16_t wm[8])
> {
> struct seq_file *m = file->private_data;
> struct drm_device *dev = m->private;
> - uint16_t new[5] = { 0 };
> + uint16_t new[8] = { 0 };
> int num_levels = ilk_wm_max_level(dev) + 1;
> int level;
> int ret;
> @@ -3598,7 +3623,9 @@ static ssize_t wm_latency_write(struct file *file, const char __user *ubuf,
>
> tmp[len] = '\0';
>
> - ret = sscanf(tmp, "%hu %hu %hu %hu %hu", &new[0], &new[1], &new[2], &new[3], &new[4]);
> + ret = sscanf(tmp, "%hu %hu %hu %hu %hu %hu %hu %hu",
> + &new[0], &new[1], &new[2], &new[3],
> + &new[4], &new[5], &new[6], &new[7]);
> if (ret != num_levels)
> return -EINVAL;
>
> @@ -3618,8 +3645,15 @@ static ssize_t pri_wm_latency_write(struct file *file, const char __user *ubuf,
> {
> struct seq_file *m = file->private_data;
> struct drm_device *dev = m->private;
> + struct drm_i915_private *dev_priv = dev->dev_private;
> + uint16_t *latencies;
>
> - return wm_latency_write(file, ubuf, len, offp, to_i915(dev)->wm.pri_latency);
> + if (INTEL_INFO(dev)->gen >= 9)
> + latencies = dev_priv->wm.skl_latency;
> + else
> + latencies = to_i915(dev)->wm.pri_latency;
> +
> + return wm_latency_write(file, ubuf, len, offp, latencies);
> }
>
> static ssize_t spr_wm_latency_write(struct file *file, const char __user *ubuf,
> @@ -3627,8 +3661,15 @@ static ssize_t spr_wm_latency_write(struct file *file, const char __user *ubuf,
> {
> struct seq_file *m = file->private_data;
> struct drm_device *dev = m->private;
> + struct drm_i915_private *dev_priv = dev->dev_private;
> + uint16_t *latencies;
>
> - return wm_latency_write(file, ubuf, len, offp, to_i915(dev)->wm.spr_latency);
> + if (INTEL_INFO(dev)->gen >= 9)
> + latencies = dev_priv->wm.skl_latency;
> + else
> + latencies = to_i915(dev)->wm.spr_latency;
> +
> + return wm_latency_write(file, ubuf, len, offp, latencies);
> }
>
> static ssize_t cur_wm_latency_write(struct file *file, const char __user *ubuf,
> @@ -3636,8 +3677,15 @@ static ssize_t cur_wm_latency_write(struct file *file, const char __user *ubuf,
> {
> struct seq_file *m = file->private_data;
> struct drm_device *dev = m->private;
> + struct drm_i915_private *dev_priv = dev->dev_private;
> + uint16_t *latencies;
> +
> + if (INTEL_INFO(dev)->gen >= 9)
> + latencies = dev_priv->wm.skl_latency;
> + else
> + latencies = to_i915(dev)->wm.cur_latency;
>
> - return wm_latency_write(file, ubuf, len, offp, to_i915(dev)->wm.cur_latency);
> + return wm_latency_write(file, ubuf, len, offp, latencies);
> }
>
> static const struct file_operations i915_pri_wm_latency_fops = {
> --
> 1.8.3.1
>
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--
Ville Syrjälä
Intel OTC
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