[Intel-gfx] [PATCH] drm/i915: WaRsClearFWBitsAtReset - WA for blitter, render and media forcewake on BDW and GEN9 platforms.

[Suketu Shah]

The newly loaded Gfx driver must first initialize the forcewake request register
for render, media and blitter engines by clearing all forcewake bits (0xFFFF0000).
This applies to BDW and GEN9 platforms.

Change-Id: I633c530340a5918c084249a188d0397ed4f51a41
Signed-off-by: Suketu Shah <suketu.j.shah at intel.com>
---
 drivers/gpu/drm/i915/intel_uncore.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index c9bf39e..9d94497 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1345,6 +1345,14 @@ void intel_uncore_init(struct drm_device *dev)
 		dev_priv->uncore.funcs.mmio_readq  = gen4_read64;
 		break;
 	}
+
+	/* WaRsClearFWBitsAtReset: The newly loaded Gfx driver must first initialize the
+	  * forcewake request register for render, media and blitter engines by clearing
+	  * all forcewake bits (0xFFFF0000) on resets.
+	  * This applies to BDW and Gen9 platforms.
+	  */
+	if (IS_BROADWELL(dev) || IS_GEN9(dev))
+		intel_uncore_forcewake_reset(dev, false);
 }
 
 void intel_uncore_fini(struct drm_device *dev)
-- 
2.1.0