[Intel-gfx] [PATCH 1/4] drm/i915: Suppress redundant syncs with mmio page flips

[Daniel Vetter]

On Fri, Sep 19, 2014 at 08:58:58PM +0300, Ville Syrjälä wrote:
> On Wed, Jun 18, 2014 at 12:23:14PM +0100, Chris Wilson wrote:
> > Since mmio-flips do not occur on the suggested ring, we are introducing
> > an extra sync operation where none is required. Pass the current
> > obj->ring, which is what mmio flip will use, to pin_to_display_plane so
> > that we emit the appropriate synchronisation (none).
> > 
> > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> 
> I had a vague recollection that I had seen something like this and now I
> found it...
> 
> The patch could use a rebase I think, and perhaps it could use a boolean
> to avoid duplicating the buffer pinning in two place? I was thinking
> something like:

Yeah, patch doesn't apply with the s/seqno/request/ patch, which I don't
have here. And the conflict looks messy enough that I don't want to fix it
up myself. Can you please rebase?

Thanks, Daniel

> 
> ring = whatever;
> bool mmio_flip = use_mmio_flip(ring);
> if (mmio_flip)
> 	ring = obj->ring;
> pin_and_fence(ring);
> ...
> if (mmio_flip)
> 	...
> else
> 	...
> 
> But either way this gets
> Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> > ---
> >  drivers/gpu/drm/i915/intel_display.c | 29 ++++++++++++++++++++---------
> >  1 file changed, 20 insertions(+), 9 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 5e8e711..55cb343 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -9492,21 +9492,32 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
> >  		ring = &dev_priv->ring[RCS];
> >  	}
> >  
> > -	ret = intel_pin_and_fence_fb_obj(dev, obj, ring);
> > -	if (ret)
> > -		goto cleanup_pending;
> > +	if (use_mmio_flip(ring, obj)) {
> > +		ret = intel_pin_and_fence_fb_obj(dev, obj, obj->ring);
> > +		if (ret)
> > +			goto cleanup_pending;
> >  
> > -	work->gtt_offset =
> > -		i915_gem_obj_ggtt_offset(obj) + intel_crtc->dspaddr_offset;
> > +		work->gtt_offset =
> > +			i915_gem_obj_ggtt_offset(obj) + intel_crtc->dspaddr_offset;
> >  
> > -	if (use_mmio_flip(ring, obj))
> >  		ret = intel_queue_mmio_flip(dev, crtc, fb, obj, ring,
> >  					    page_flip_flags);
> > -	else
> > +		if (ret)
> > +			goto cleanup_unpin;
> > +
> > +	} else {
> > +		ret = intel_pin_and_fence_fb_obj(dev, obj, ring);
> > +		if (ret)
> > +			goto cleanup_pending;
> > +
> > +		work->gtt_offset =
> > +			i915_gem_obj_ggtt_offset(obj) + intel_crtc->dspaddr_offset;
> > +
> >  		ret = dev_priv->display.queue_flip(dev, crtc, fb, obj, ring,
> >  				page_flip_flags);
> > -	if (ret)
> > -		goto cleanup_unpin;
> > +		if (ret)
> > +			goto cleanup_unpin;
> > +	}
> >  
> >  	intel_disable_fbc(dev);
> >  	intel_mark_fb_busy(obj, NULL);
> > -- 
> > 1.9.1
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx at lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Ville Syrjälä
> Intel OTC
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch