[Intel-gfx] [RFC] drm/i915: Add sysfs entry for reading GPU Timestamp

[Michał Winiarski]

Reading timestamp register using I915_READ64 returns incorrect value.
Unfortunately, that's how I915_REG_READ ioctl is handling it on x86_64,
resulting in different counter size (we can only get 32 usable bits on
x86_64 vs 36 bits on x86).
Propose new sysfs interface for accessing full 36 bits of timestamp in
architecture independent way (using two consecutive reads).

Signed-off-by: Michał Winiarski <michal.winiarski at intel.com>
---
 drivers/gpu/drm/i915/i915_sysfs.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
index 503847f..30e8e16 100644
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -590,6 +590,23 @@ static struct bin_attribute error_state_attr = {
 	.write = error_state_write,
 };
 
+static ssize_t timestamp_show(struct device *dev, struct device_attribute *attr,
+				char *buf)
+{
+	struct drm_minor *dminor = dev_to_drm_minor(dev);
+	struct drm_device *drm_dev = dminor->dev;
+	struct drm_i915_private *dev_priv = drm_dev->dev_private;
+	u64 val;
+	val = I915_READ64_2x32(RING_TIMESTAMP(RENDER_RING_BASE), RING_TIMESTAMP(RENDER_RING_BASE) + 4);
+	return snprintf(buf, PAGE_SIZE, "%llu\n", val);
+}
+
+static struct device_attribute timestamp_attr = {
+	.attr.name = "timestamp",
+	.attr.mode = S_IRUGO,
+	.show = timestamp_show,
+};
+
 void i915_setup_sysfs(struct drm_device *dev)
 {
 	int ret;
@@ -627,6 +644,10 @@ void i915_setup_sysfs(struct drm_device *dev)
 				    &error_state_attr);
 	if (ret)
 		DRM_ERROR("error_state sysfs setup failed\n");
+
+	ret = device_create_file(dev->primary->kdev, &timestamp_attr);
+	if (ret)
+		DRM_ERROR("timestamp sysfs setup failed\n");
 }
 
 void i915_teardown_sysfs(struct drm_device *dev)
-- 
1.9.3