[Intel-gfx] [PATCH 3/5] drm/i915/bdw: WaProgramL3SqcReg1Default

Rodrigo Vivi rodrigo.vivi at gmail.com
Fri Sep 26 20:32:18 CEST 2014


On Fri, Sep 26, 2014 at 5:03 AM, Mika Kuoppala
<mika.kuoppala at linux.intel.com> wrote:
>
> Rodrigo Vivi <rodrigo.vivi at intel.com> writes:
>
> > Program the default initial value of the L3SqcReg1 on BDW for performance
> >
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_reg.h | 3 +++
> >  drivers/gpu/drm/i915/intel_pm.c | 3 +++
> >  2 files changed, 6 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index 124ea60..8aafa08 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -4821,6 +4821,9 @@ enum punit_power_well {
> >  #define GEN7_L3SQCREG1                               0xB010
> >  #define  VLV_B0_WA_L3SQCREG1_VALUE           0x00D30000
> >
> > +#define GEN8_L3SQCREG1                               0xB100
> > +#define  BDW_WA_L3SQCREG1_DEFAULT            0x00610000
> > +
>
> This is the default after reset. I think we want 0x00810000

Why do you think that?
Bspec explict says
Default Value: 0x00610000 [BDW]

And bit by bit:
[23:19] 01100b 24 (default)
[18:14] 00100b 8 (default)

0 as default for all other bits what end up on 0x00610000

>
> -Mika
>
> >  #define GEN7_L3CNTLREG1                              0xB01C
> >  #define  GEN7_WA_FOR_GEN7_L3_CONTROL                 0x3C47FF8C
> >  #define  GEN7_L3AGDIS                                (1<<19)
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 1ec3c8f..8a58565 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -5811,6 +5811,9 @@ static void broadwell_init_clock_gating(struct drm_device *dev)
> >       I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
> >                  GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
> >
> > +     /* WaProgramL3SqcReg1Default:bdw */
> > +     I915_WRITE(GEN8_L3SQCREG1, BDW_WA_L3SQCREG1_DEFAULT);
> > +
>
> Should we use intel_ring_emit_wa?

Yes, this is probably better to do it after all resets right?!
I do a v2 after we agree on the default value.


>
> -Mika
>
> >       lpt_init_clock_gating(dev);
> >  }
> >
> > --
> > 1.9.3
> >
> > _______________________________________________
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> > Intel-gfx at lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
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-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br



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