[Intel-gfx] [RFC PATCH 6/8] drm/i915: redirect GTT accesses to vgt if enabled
Jike Song
jike.song at intel.com
Tue Sep 30 12:05:36 CEST 2014
Signed-off-by: Jike Song <jike.song at intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 41 ++++++++++++++++++++++++++++++++++-------
1 file changed, 34 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 051442e..742fe8a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3077,27 +3077,54 @@ int vlv_freq_opcode(struct drm_i915_private *dev_priv, int val);
#define GTT_READ32(addr) \
({ \
- u32 ret = readl(addr); \
- ret; \
+ off_t reg = (unsigned long)(addr) - \
+ (unsigned long)(dev_priv->gtt.gsm); \
+ u32 __ret = 0; \
+ if (i915.enable_vgt) \
+ vgt_emulate_host_read(reg, &__ret, sizeof(u32), \
+ true, false); \
+ else \
+ __ret = readl(addr); \
+ __ret; \
})
#define GTT_READ64(addr) \
({ \
- u64 ret = readq(addr); \
- ret; \
+ off_t reg = (unsigned long)(addr) - \
+ (unsigned long)(dev_priv->gtt.gsm); \
+ u64 __ret = 0; \
+ if (i915.enable_vgt) \
+ vgt_emulate_host_read(reg, &__ret, sizeof(u64), \
+ true, false); \
+ else \
+ __ret = readq(addr); \
+ __ret; \
})
#define GTT_WRITE32(val, addr) \
({ \
- writel((val), (addr)); \
+ off_t reg = (unsigned long)(addr) - \
+ (unsigned long)(dev_priv->gtt.gsm); \
+ u32 __val = (val); \
+ if (i915.enable_vgt) \
+ vgt_emulate_host_write(reg, &__val, sizeof(u32), \
+ true, false); \
+ else \
+ writel((val), (addr)); \
})
#define GTT_WRITE64(val, addr) \
({ \
- writeq((val), (addr)); \
+ off_t reg = (unsigned long)(addr) - \
+ (unsigned long)(dev_priv->gtt.gsm); \
+ u64 __val = (val); \
+ if (i915.enable_vgt) \
+ vgt_emulate_host_write(reg, &__val, sizeof(u64), \
+ true, false); \
+ else \
+ writeq((val), (addr)); \
})
-
/* "Broadcast RGB" property */
#define INTEL_BROADCAST_RGB_AUTO 0
#define INTEL_BROADCAST_RGB_FULL 1
--
1.9.1
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