[Intel-gfx] [PATCH 0/8] Enable DC states for skl.

[Jani Nikula]

On Wed, 01 Apr 2015, Animesh Manna <animesh.manna at intel.com> wrote:
> This patch series contains the implementation for enabling DC states for gen9 
> platform, specifically for skl. Few bxt specific changes will be submitted 
> seperately in a different patch series which will be extended support for bxt 
> and will use major portion of the code of this patch series.

Please resend the series with git send-email in one go so that the
patches are threaded, all in-reply-to the cover letter. This should be
the default when sending multiple patches at a time. Please check your
config. Maybe try --dry-run and/or send just to yourself first.

Without it, a series like this will quickly break apart in our inboxes
and will be hard to track.

Thanks,
Jani.


>
> A.Sunil Kamath (3):
>   drm/i915/skl: Add support to load SKL CSR firmware.
>   drm/i915/skl: Implement enable/disable for Display C5 sttate.
>   drm/i915/skl: Implement enable/disable for Display C6 state.
>
> Suketu Shah (5):
>   drm/i915/skl: Add DC5 Trigger Sequence
>   drm/i915/skl: Assert the requirements to enter or exit DC5.
>   drm/i915/skl: Add DC6 Trigger sequence.
>   drm/i915/skl: Assert the requirements to enter or exit DC6.
>   drm/i915/skl: Enable runtime PM
>
>  drivers/gpu/drm/i915/Makefile           |   3 +-
>  drivers/gpu/drm/i915/i915_dma.c         |  12 +-
>  drivers/gpu/drm/i915/i915_drv.c         |  49 +++++
>  drivers/gpu/drm/i915/i915_drv.h         | 138 +++++++++++++-
>  drivers/gpu/drm/i915/i915_reg.h         |  29 +++
>  drivers/gpu/drm/i915/intel_csr.c        | 310 ++++++++++++++++++++++++++++++++
>  drivers/gpu/drm/i915/intel_drv.h        |   9 +
>  drivers/gpu/drm/i915/intel_runtime_pm.c | 232 ++++++++++++++++++++++--
>  8 files changed, 760 insertions(+), 22 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/intel_csr.c
>
> -- 
> 2.0.2
>
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-- 
Jani Nikula, Intel Open Source Technology Center