[Intel-gfx] [PATCH 0/4 v2] BXT basic slice/subslice/EU stuff

[jeff.mcgee at intel.com]

From: Jeff McGee <jeff.mcgee at intel.com>

Reworked this set by first breaking out the existing logic into
more manageable per-device functions as suggested by Daniel. Then
added Broxton support within the Skylake logic, also suggested by
Daniel.

These patches are dependent on the initial BXT enabling set from
Imre, particularly the IS_BROXTON macro.

Jeff McGee (4):
  drm/i915: Split SSEU init into functions by platform
  drm/i915/bxt: Determine BXT slice/subslice/EU info
  drm/i915: Split-up SSEU device status by platform
  drm/i915/bxt: Support BXT in SSEU device status dump

 drivers/gpu/drm/i915/i915_debugfs.c | 193 +++++++++++++++++-----------
 drivers/gpu/drm/i915/i915_dma.c     | 247 ++++++++++++++++++++----------------
 drivers/gpu/drm/i915/i915_reg.h     |  17 +--
 3 files changed, 263 insertions(+), 194 deletions(-)

-- 
2.3.3