[Intel-gfx] [PATCH 50/70] drm/i915: The argument for postfix is redundant
Chris Wilson
chris at chris-wilson.co.uk
Tue Apr 7 08:21:14 PDT 2015
We are conservative on the amount of free space available in the ring to
avoid overruning the potential MI_INTERRUPT after the seqno write.
Further undermining the justification for the change was that it was
applied incorrectly.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_drv.h | 14 ++------------
drivers/gpu/drm/i915/i915_gem.c | 9 +--------
drivers/gpu/drm/i915/i915_gpu_error.c | 2 +-
drivers/gpu/drm/i915/intel_dvo.c | 2 +-
drivers/gpu/drm/i915/intel_lrc.c | 8 +++-----
drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +-
6 files changed, 9 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c710a9ea1458..4b46c5b5eb44 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2074,18 +2074,8 @@ struct drm_i915_gem_request {
/** GEM sequence number associated with this request. */
uint32_t seqno;
- /** Position in the ringbuffer of the start of the request */
- u32 head;
-
- /**
- * Position in the ringbuffer of the start of the postfix.
- * This is required to calculate the maximum available ringbuffer
- * space without overwriting the postfix.
- */
- u32 postfix;
-
- /** Position in the ringbuffer of the end of the whole request */
- u32 tail;
+ /** Position in the ringbuffer of the request */
+ u32 head, tail;
/**
* Context and ring buffer related to this request
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 729c7fa02e12..d9b5bf4f1f21 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1359,7 +1359,7 @@ void i915_gem_request_retire(struct drm_i915_gem_request *request)
* Note this requires that we are always called in request
* completion order.
*/
- request->ringbuf->last_retired_head = request->postfix;
+ request->ringbuf->last_retired_head = request->tail;
list_del_init(&request->list);
i915_gem_request_remove_from_client(request);
@@ -2495,13 +2495,6 @@ int __i915_add_request(struct intel_engine_cs *ring,
return ret;
}
- /* Record the position of the start of the request so that
- * should we detect the updated seqno part-way through the
- * GPU processing the request, we never over-estimate the
- * position of the head.
- */
- request->postfix = intel_ring_get_tail(ringbuf);
-
if (i915.enable_execlists) {
ret = ring->emit_request(ringbuf, request);
if (ret)
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 8832f1b2a495..b7a00e464ba4 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -1072,7 +1072,7 @@ static void i915_gem_record_rings(struct drm_device *dev,
erq = &error->ring[i].requests[count++];
erq->seqno = request->seqno;
erq->jiffies = request->emitted_jiffies;
- erq->tail = request->postfix;
+ erq->tail = request->tail;
}
}
}
diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
index 9a27ec7100ef..f45caa6af7d2 100644
--- a/drivers/gpu/drm/i915/intel_dvo.c
+++ b/drivers/gpu/drm/i915/intel_dvo.c
@@ -496,7 +496,7 @@ void intel_dvo_init(struct drm_device *dev)
int gpio;
bool dvoinit;
enum pipe pipe;
- uint32_t dpll[2];
+ uint32_t dpll[I915_MAX_PIPES];
/* Allow the I2C driver info to specify the GPIO to be used in
* special cases, but otherwise default to what's defined
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index a62ffaa45bd1..b3ca88ff88eb 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -409,7 +409,6 @@ void intel_lrc_irq_handler(struct intel_engine_cs *ring)
static int execlists_context_queue(struct intel_engine_cs *ring,
struct intel_context *to,
- u32 tail,
struct drm_i915_gem_request *request)
{
if (WARN_ON(request == NULL))
@@ -421,8 +420,6 @@ static int execlists_context_queue(struct intel_engine_cs *ring,
i915_gem_request_reference(request);
WARN_ON(to != request->ctx);
- request->tail = tail;
-
spin_lock_irq(&ring->execlist_lock);
list_add_tail(&request->execlist_link, &ring->execlist_queue);
@@ -574,7 +571,7 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
continue;
/* Would completion of this request free enough space? */
- space = __intel_ring_space(request->postfix, ringbuf->tail,
+ space = __intel_ring_space(request->tail, ringbuf->tail,
ringbuf->size);
if (space >= bytes)
break;
@@ -608,11 +605,12 @@ intel_logical_ring_advance_and_submit(struct intel_ringbuffer *ringbuf,
struct intel_engine_cs *ring = ringbuf->ring;
intel_logical_ring_advance(ringbuf);
+ request->tail = ringbuf->tail;
if (intel_ring_stopped(ring))
return;
- execlists_context_queue(ring, ctx, ringbuf->tail, request);
+ execlists_context_queue(ring, ctx, request);
}
static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf,
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 441adc8fa535..0b68ac5a7298 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2096,7 +2096,7 @@ static int ring_wait_for_space(struct intel_engine_cs *ring, int n)
return 0;
list_for_each_entry(request, &ring->request_list, list) {
- space = __intel_ring_space(request->postfix, ringbuf->tail,
+ space = __intel_ring_space(request->tail, ringbuf->tail,
ringbuf->size);
if (space >= n)
break;
--
2.1.4
More information about the Intel-gfx
mailing list