[Intel-gfx] [PATCH 2/2] drm/i915: Disable Render power gating

sagar.a.kamble at intel.com sagar.a.kamble at intel.com
Fri Apr 10 01:41:30 PDT 2015


From: Sagar Kamble <sagar.a.kamble at intel.com>

When RC6 along with Render power gating is enabled, GPU hang
happens due to lack of synchronization between GTI and Render reset.

Change-Id: If1614206341eb52a21eadae8c5ebb2655029b50c
Signed-off-by: Sagar Kamble <sagar.a.kamble at intel.com>

Conflicts:
	drivers/gpu/drm/i915/intel_pm.c
---
 drivers/gpu/drm/i915/intel_pm.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 9975401..f080710 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4350,9 +4350,12 @@ static void gen9_enable_rc6(struct drm_device *dev)
 				   GEN6_RC_CTL_EI_MODE(1) |
 				   rc6_mask);
 
-	/* 3b: Enable Coarse Power Gating only when RC6 is enabled */
+	/*
+	 * 3b: Enable Coarse Power Gating only when RC6 is enabled.
+	 * WaDisableRenderPowerGating - Render PG need to be disabled with RC6.
+	 */
 	I915_WRITE(GEN9_PG_ENABLE, (rc6_mask & GEN6_RC_CTL_RC6_ENABLE) ?
-			(GEN9_RENDER_PG_ENABLE | GEN9_MEDIA_PG_ENABLE) : 0);
+			GEN9_MEDIA_PG_ENABLE : 0);
 
 
 	intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
-- 
1.8.5



More information about the Intel-gfx mailing list