[Intel-gfx] [PATCH 1/2] drm/i915: Naming constants to be written to GEN9_PG_ENABLE

Damien Lespiau damien.lespiau at intel.com
Fri Apr 10 01:57:31 PDT 2015


On Fri, Apr 10, 2015 at 02:11:29PM +0530, sagar.a.kamble at intel.com wrote:
> From: Sagar Kamble <sagar.a.kamble at intel.com>
> 
> Change-Id: I4253459c075c50d9b6f034b4ed4ad2f54cd7d1d7
> Signed-off-by: Sagar Kamble <sagar.a.kamble at intel.com>

Reviewed-by: Damien Lespiau <damien.lespiau at intel.com>

> ---
>  drivers/gpu/drm/i915/i915_reg.h | 2 ++
>  drivers/gpu/drm/i915/intel_pm.c | 4 +++-
>  2 files changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index c6adf2d..f593900 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -6199,6 +6199,8 @@ enum skl_disp_power_wells {
>  #define GEN9_MEDIA_PG_IDLE_HYSTERESIS		0xA0C4
>  #define GEN9_RENDER_PG_IDLE_HYSTERESIS		0xA0C8
>  #define GEN9_PG_ENABLE				0xA210
> +#define GEN9_RENDER_PG_ENABLE			(1<<0)
> +#define GEN9_MEDIA_PG_ENABLE			(1<<1)
>  
>  #define VLV_CHICKEN_3				(VLV_DISPLAY_BASE + 0x7040C)
>  #define  PIXEL_OVERLAP_CNT_MASK			(3 << 30)
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index cafdb29..9975401 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4351,7 +4351,9 @@ static void gen9_enable_rc6(struct drm_device *dev)
>  				   rc6_mask);
>  
>  	/* 3b: Enable Coarse Power Gating only when RC6 is enabled */
> -	I915_WRITE(GEN9_PG_ENABLE, (rc6_mask & GEN6_RC_CTL_RC6_ENABLE) ? 3 : 0);
> +	I915_WRITE(GEN9_PG_ENABLE, (rc6_mask & GEN6_RC_CTL_RC6_ENABLE) ?
> +			(GEN9_RENDER_PG_ENABLE | GEN9_MEDIA_PG_ENABLE) : 0);
> +
>  
>  	intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
>  
> -- 
> 1.8.5
> 
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