[Intel-gfx] [PATCH v2 0/8] Enable DC states for skl.

[Animesh Manna]

v2: Refactored the code based on review comments.

v1:
This patch series contains the implementation for enabling DC states for gen9 
platform, specifically for skl. Few bxt specific changes will be submitted 
seperately in a different patch series which will be extended support for bxt 
and will use major portion of the code of this patch series.

A.Sunil Kamath (3):
  drm/i915/skl: Add support to load SKL CSR firmware
  drm/i915/skl: Implement enable/disable for Display C5 sttate.
  drm/i915/skl: Implement enable/disable for Display C6 state.

Suketu Shah (5):
  drm/i915/skl: Add DC5 Trigger Sequence
  drm/i915/skl: Assert the requirements to enter or exit DC5.
  drm/i915/skl: Add DC6 Trigger sequence.
  drm/i915/skl: Assert the requirements to enter or exit DC6.
  drm/i915/skl: Enable runtime PM

 drivers/gpu/drm/i915/Makefile           |   3 +-
 drivers/gpu/drm/i915/i915_dma.c         |  13 +-
 drivers/gpu/drm/i915/i915_drv.c         |  50 ++++++
 drivers/gpu/drm/i915/i915_drv.h         |  27 ++-
 drivers/gpu/drm/i915/i915_reg.h         |  11 ++
 drivers/gpu/drm/i915/intel_csr.c        | 281 ++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_csr.h        | 161 ++++++++++++++++++
 drivers/gpu/drm/i915/intel_drv.h        |   7 +
 drivers/gpu/drm/i915/intel_runtime_pm.c | 210 +++++++++++++++++++++++-
 9 files changed, 759 insertions(+), 4 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/intel_csr.c
 create mode 100644 drivers/gpu/drm/i915/intel_csr.h

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2.0.2