[Intel-gfx] [PATCH 32/49] drm/i915/bxt: Implement enable/disable for Display C9 state
Sagar Arun Kamble
sagar.a.kamble at intel.com
Mon Apr 13 03:25:15 PDT 2015
On Mon, 2015-04-13 at 13:09 +0300, Imre Deak wrote:
> On su, 2015-04-12 at 16:02 +0530, sagar.a.kamble at intel.com wrote:
> > These are review comments for
> > 1) http://lists.freedesktop.org/archives/intel-gfx/2015-March/062167.html
> > 2) http://lists.freedesktop.org/archives/intel-gfx/2015-March/062168.html
>
> It'd be better to have inlined review comments responding to the
> original email.
Yes. Sorry for the inconvenience. My ML subscription was in digest mode.
So replied using only message-id knowing from Deepak. Now I have
switched to individual mails.
>
> > Couple of comments:
> > 1) Defines for DC_STATE_EN* are coming up as part of
> > http://lists.freedesktop.org/archives/intel-gfx/2015-April/063640.html.
> > Need to rebase this patch on top of it then or vice-versa.
>
> Yes, I can rebase this once Animesh's patchset gets merged. It's also a
> trivial conflict that can be easily resolved while merging, so it's not
> an issue imo.
>
> > 2) DC5 has to enabled back after disabling DC9 if PW2 is power gated.
>
> BXT DC5/runtime PM support will be added only later. At that point the
> enabling of DC5 should be done from bxt_resume_prepare() if the the DMC
> firmware is loaded. For now I'd just add the missing TODO comment about
> this to bxt_resume_prepare() as you suggested elsewhere.
Thanks.
Reviewed-by: Sagar Kamble <sagar.a.kamble at intel.com>
>
> --Imre
>
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