[Intel-gfx] [PATCH 2/9] drm/i915/vlv: check port in infoframe_enabled v2

[Daniel Vetter]

On Wed, Apr 15, 2015 at 04:52:29PM -0700, Rodrigo Vivi wrote:
> From: Jesse Barnes <jbarnes at virtuousgeek.org>
> 
> Same as IBX and G4x, they all share the same genetic material.
> 
> v2: we all need a bit more port in our lives
> 
> Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
> Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he at intel.com)
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>

Queued for -next, thanks for the patch.
-Daniel
> ---
>  drivers/gpu/drm/i915/intel_hdmi.c | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
> index 26222e6..0863f1e 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -324,10 +324,15 @@ static bool vlv_infoframe_enabled(struct drm_encoder *encoder)
>  	struct drm_device *dev = encoder->dev;
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
> +	struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder);
>  	int reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe);
>  	u32 val = I915_READ(reg);
> +	u32 port = intel_dig_port->port;
>  
> -	return val & VIDEO_DIP_ENABLE;
> +	if (port == (val & VIDEO_DIP_PORT_MASK))
> +		return val & VIDEO_DIP_ENABLE;
> +
> +	return false;
>  }
>  
>  static void hsw_write_infoframe(struct drm_encoder *encoder,
> -- 
> 2.1.0
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch