[Intel-gfx] [PATCH 2/2] drm/i915: Only enabled DRRS if PRS won't be enabled on this pipe.

shuang.he at intel.com shuang.he at intel.com
Thu Apr 16 04:49:18 PDT 2015


Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he at intel.com)
Task id: 6206
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                                  276/276              276/276
ILK                                  302/302              302/302
SNB                                  318/318              318/318
IVB                                  341/341              341/341
BYT                                  287/287              287/287
HSW                 -2              395/395              393/395
BDW                                  318/318              318/318
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
 HSW  igt at gem_pwrite_pread@snooped-copy-performance      DMESG_WARN(1)PASS(4)      DMESG_WARN(1)PASS(1)
(dmesg patch applied)drm:i915_hangcheck_elapsed[i915]]*ERROR*Hangcheck_timer_elapsed...blitter_ring_idle at Hangcheck timer elapsed... blitter ring idle
*HSW  igt at gem_pwrite_pread@snooped-pwrite-blt-cpu_mmap-performance      PASS(6)      DMESG_WARN(2)
(dmesg patch applied)drm:i915_hangcheck_elapsed[i915]]*ERROR*Hangcheck_timer_elapsed...blitter_ring_idle at Hangcheck timer elapsed... blitter ring idle
Note: You need to pay more attention to line start with '*'


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