[Intel-gfx] [PATCH 9/9] drm/i915: Attach a PSR property on eDP
shuang.he at intel.com
shuang.he at intel.com
Thu Apr 16 11:44:04 PDT 2015
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he at intel.com)
Task id: 6209
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 276/276 276/276
ILK 302/302 302/302
SNB 318/318 318/318
IVB 341/341 341/341
BYT -2 287/287 285/287
HSW -1 395/395 394/395
BDW -1 318/318 317/318
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
BYT igt at kms_setmode@clone-exclusive-crtc DMESG_WARN(1)PASS(2) DMESG_WARN(2)
(dmesg patch applied)drm:check_crtc_state[i915]]*ERROR*mismatch_in_has_infoframe(expected#,found#)@mismatch in has_infoframe .* found
WARNING:at_drivers/gpu/drm/i915/intel_display.c:#check_crtc_state[i915]()@WARNING:.* at .* check_crtc_state+0x
BYT igt at kms_setmode@clone-single-crtc DMESG_WARN(1)PASS(2) DMESG_WARN(2)
(dmesg patch applied)drm:check_crtc_state[i915]]*ERROR*mismatch_in_has_infoframe(expected#,found#)@mismatch in has_infoframe .* found
WARNING:at_drivers/gpu/drm/i915/intel_display.c:#check_crtc_state[i915]()@WARNING:.* at .* check_crtc_state+0x
*HSW igt at gem_caching@writes PASS(2) DMESG_WARN(1)PASS(1)
(dmesg patch applied)drm:i915_hangcheck_elapsed[i915]]*ERROR*Hangcheck_timer_elapsed...blitter_ring_idle at Hangcheck timer elapsed... blitter ring idle
*BDW igt at gem_userptr_blits@forked-sync-multifd-mempressure-normal PASS(2) TIMEOUT(1)PASS(1)
Note: You need to pay more attention to line start with '*'
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