[Intel-gfx] [PATCH 05/17] drm/i915: Move PTE_READ_ONLY to ->pte_encode vfunc

[Mika Kuoppala]

Daniel Vetter <daniel.vetter at ffwll.ch> writes:

> It's only used as a flag there, so unconfuse things a bit.
> Also separate the bind_vma flag space from the pte_encode flag
> space in the code.
>
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>

Reviewed-by: Mika Kuoppala <mika.kuoppala at intel.com>

> ---
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 15 +++++++++------
>  drivers/gpu/drm/i915/i915_gem_gtt.h |  3 ++-
>  2 files changed, 11 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 75787f1d2751..4e2caef83772 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -1610,14 +1610,16 @@ void  i915_ppgtt_release(struct kref *kref)
>  static void
>  ppgtt_bind_vma(struct i915_vma *vma,
>  	       enum i915_cache_level cache_level,
> -	       u32 flags)
> +	       u32 unused)
>  {
> +	u32 pte_flags = 0;
> +
>  	/* Currently applicable only to VLV */
>  	if (vma->obj->gt_ro)
> -		flags |= PTE_READ_ONLY;
> +		pte_flags |= PTE_READ_ONLY;
>  
>  	vma->vm->insert_entries(vma->vm, vma->obj->pages, vma->node.start,
> -				cache_level, flags);
> +				cache_level, pte_flags);
>  }
>  
>  static void ppgtt_unbind_vma(struct i915_vma *vma)
> @@ -1986,10 +1988,11 @@ static void ggtt_bind_vma(struct i915_vma *vma,
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	struct drm_i915_gem_object *obj = vma->obj;
>  	struct sg_table *pages = obj->pages;
> +	u32 pte_flags = 0;
>  
>  	/* Currently applicable only to VLV */
>  	if (obj->gt_ro)
> -		flags |= PTE_READ_ONLY;
> +		pte_flags |= PTE_READ_ONLY;
>  
>  	if (i915_is_ggtt(vma->vm))
>  		pages = vma->ggtt_view.pages;
> @@ -2010,7 +2013,7 @@ static void ggtt_bind_vma(struct i915_vma *vma,
>  		    (cache_level != obj->cache_level)) {
>  			vma->vm->insert_entries(vma->vm, pages,
>  						vma->node.start,
> -						cache_level, flags);
> +						cache_level, pte_flags);
>  			vma->bound |= GLOBAL_BIND;
>  		}
>  	}
> @@ -2021,7 +2024,7 @@ static void ggtt_bind_vma(struct i915_vma *vma,
>  		struct i915_hw_ppgtt *appgtt = dev_priv->mm.aliasing_ppgtt;
>  		appgtt->base.insert_entries(&appgtt->base, pages,
>  					    vma->node.start,
> -					    cache_level, flags);
> +					    cache_level, pte_flags);
>  		vma->bound |= LOCAL_BIND;
>  	}
>  }
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
> index 12d0ded0d823..fb0a04aa5363 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.h
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
> @@ -158,7 +158,6 @@ struct i915_vma {
>  	/** Flags and address space this VMA is bound to */
>  #define GLOBAL_BIND	(1<<0)
>  #define LOCAL_BIND	(1<<1)
> -#define PTE_READ_ONLY	(1<<2)
>  	unsigned int bound : 4;
>  
>  	/**
> @@ -261,6 +260,8 @@ struct i915_address_space {
>  	gen6_pte_t (*pte_encode)(dma_addr_t addr,
>  				 enum i915_cache_level level,
>  				 bool valid, u32 flags); /* Create a valid PTE */
> +	/* flags for pte_encode */
> +#define PTE_READ_ONLY	(1<<0)
>  	int (*allocate_va_range)(struct i915_address_space *vm,
>  				 uint64_t start,
>  				 uint64_t length);
> -- 
> 2.1.0
>
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