[Intel-gfx] [PATCH v3 07/15] drm/i915: Add functions to allocate / release gem obj for GuC

[Chris Wilson]

On Fri, Apr 17, 2015 at 02:21:12PM -0700, yu.dai at intel.com wrote:
> From: Alex Dai <yu.dai at intel.com>
> 
> All gem objects used by GuC are pinned to ggtt space out of range
> [0, WOPCM size]. In GuC address space mapping, [0, WPOCM size] is
> used internally for its Boot ROM, SRAM etc. Currently this WPOCM
> size is 512K. This is done by using of PIN_OFFSET_BIAS.

If the region is reserved, remove that region from the GGTT drm_mm range
manager. Then the restriction is applied to all objects and not in a
hodge-podge fashion like this.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre