[Intel-gfx] [PATCH v3 08/15] drm/i915: Functions to support command submission via GuC

[Chris Wilson]

On Mon, Apr 20, 2015 at 09:07:28AM -0700, Yu Dai wrote:
> 
> 
> On 04/18/2015 06:48 AM, Chris Wilson wrote:
> >On Fri, Apr 17, 2015 at 02:21:13PM -0700, yu.dai at intel.com wrote:
> >> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> >> index de8c074..8f13e80 100644
> >> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> >> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> >> @@ -1993,7 +1993,7 @@ static int intel_init_ring_buffer(struct drm_device *dev,
> >>  	INIT_LIST_HEAD(&ring->request_list);
> >>  	INIT_LIST_HEAD(&ring->execlist_queue);
> >>  	i915_gem_batch_pool_init(dev, &ring->batch_pool);
> >> -	ringbuf->size = 32 * PAGE_SIZE;
> >> +	ringbuf->size = 4 * PAGE_SIZE;
> >>  	ringbuf->ring = ring;
> >>  	memset(ring->semaphore.sync_seqno, 0, sizeof(ring->semaphore.sync_seqno));
> >
> >NAK.
> >
> First of all, GuC firmware reserves limited bits for ring buffer. 4
> pages is max for now. Second, considering the ring buffer is
> per-context now, there is no need to allocate 32 pages for it.

Please look at which function you are changing and explain how this is
not in the least broken.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre