[Intel-gfx] [PATCH] drm/i915: Avoid GPU hang when coming out of P3 or P4

[Chris Wilson]

On Mon, Apr 27, 2015 at 03:25:14PM +0100, Peter Antoine wrote:
> This patch fixed a timing issue that causes a GPU hang when a the system
> comes out of power saving.

A few more details to explain the timing issue and why this is a fix and
not just papering over the bug.
 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89600
> Signed-off-by: Peter Antoine <peter.antoine at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index e70adfd..648866f 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -712,6 +712,11 @@ static int i915_drm_resume(struct drm_device *dev)
>  	intel_init_pch_refclk(dev);
>  	drm_mode_config_reset(dev);
>  
> +	/* We need working interrupts for modeset enabling ... */
> +	intel_runtime_pm_enable_interrupts(dev_priv);
> +
> +	intel_modeset_init_hw(dev);

Both? This makes resume do init_hw() in a different order to other
pieces of the reset/resume puzzle. Why? Do we need to consider fixing
the other pieces of code as well?
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre