[Intel-gfx] drm/i915/gen8: page directories rework allocation

Dave Gordon david.s.gordon at intel.com
Thu Apr 30 05:27:54 PDT 2015


On 30/04/15 11:47, Dan Carpenter wrote:
> Hi Michel,
> 
> The patch 69876bed7e00: "drm/i915/gen8: page directories rework
> allocation" from Apr 8, 2015, has the following issue:
> 
> 	drivers/gpu/drm/i915/i915_gem_gtt.c:760
> 	warn: too many zeroes
> 
> drivers/gpu/drm/i915/i915_gem_gtt.c
>    746  static int gen8_ppgtt_alloc_page_directories(struct i915_hw_ppgtt *ppgtt,
>    747                                       struct i915_page_directory_pointer *pdp,
>    748                                       uint64_t start,
>    749                                       uint64_t length,
>    750                                       unsigned long *new_pds)
>    751  {
>    752          struct drm_device *dev = ppgtt->base.dev;
>    753          struct i915_page_directory *pd;
>    754          uint64_t temp;
>    755          uint32_t pdpe;
>    756  
>    757          WARN_ON(!bitmap_empty(new_pds, GEN8_LEGACY_PDPES));
>    758  
>    759          /* FIXME: PPGTT container_of won't work for 64b */
>    760          WARN_ON((start + length) > 0x800000000ULL);
>                                                      ^
> This last zero was not intended.

Wouldn't (1ULL << 31) be clearer?

And shouldn't it be >= not > ?

Or perhaps,
	/* FIXME: upper bound must not overflow 31 bits */
	WARN_ON((start + length) & (~0ULL << 31));

Pick whichever you think is most comprehensible and least typo-prone!

.Dave.



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