[Intel-gfx] [PATCH-V3 2/2] ALSA:hda - reset display codec when power on

shuang.he at intel.com shuang.he at intel.com
Thu Apr 30 11:29:22 PDT 2015


Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he at intel.com)
Task id: 6287
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                                  276/276              276/276
ILK                                  302/302              302/302
SNB                                  316/316              316/316
IVB                                  264/264              264/264
BYT                 -5              227/227              222/227
BDW                                  318/318              318/318
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
*BYT  igt at gem_dummy_reloc_loop@render      FAIL(1)PASS(10)      TIMEOUT(1)PASS(1)
*BYT  igt at gem_exec_parse@bitmasks      FAIL(1)PASS(5)      DMESG_WARN(1)PASS(1)
(dmesg patch applied)drm:check_crtc_state[i915]]*ERROR*mismatch_in_has_infoframe(expected#,found#)@mismatch in has_infoframe .* found
WARNING:at_drivers/gpu/drm/i915/intel_display.c:#check_crtc_state[i915]()@WARNING:.* at .* check_crtc_state+0x
 BYT  igt at gem_pipe_control_store_loop@fresh-buffer      FAIL(1)TIMEOUT(5)PASS(6)      TIMEOUT(1)PASS(1)
*BYT  igt at gem_tiled_pread      FAIL(1)PASS(3)      DMESG_WARN(1)PASS(1)
(dmesg patch applied)drm:check_crtc_state[i915]]*ERROR*mismatch_in_has_infoframe(expected#,found#)@mismatch in has_infoframe .* found
WARNING:at_drivers/gpu/drm/i915/intel_display.c:#check_crtc_state[i915]()@WARNING:.* at .* check_crtc_state+0x
*BYT  igt at gem_userptr_blits@forked-unsync-multifd-normal      FAIL(1)PASS(2)      NO_RESULT(1)PASS(1)
Note: You need to pay more attention to line start with '*'


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