[Intel-gfx] [PATCH v8 06/19] drm/i915/gen8: Add PML4 structure

[Michel Thierry]

On 7/31/2015 6:35 PM, Goel, Akash wrote:
> On 7/31/2015 5:42 PM, Michel Thierry wrote:
>> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
>> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
>> @@ -689,9 +689,6 @@ gen8_ppgtt_insert_pte_entries(struct
>> i915_address_space *vm,
>>       pt_vaddr = NULL;
>>
>>       for_each_sg_page(pages->sgl, &sg_iter, pages->nents, 0) {
>> -        if (WARN_ON(pdpe >= GEN8_LEGACY_PDPES))
>> -            break;
>> -
> Apologize for this eleventh hour comment.
> Would this change be better off in the later patch "Add 4 level support
> in insert_entries and clear_range".

Makes sense.