[Intel-gfx] [PATCH v1 1/2] drm/i915:skl: Add WaEnableGapsTsvCreditFix

[Ben Widawsky]

On Mon, Aug 03, 2015 at 08:24:56PM +0100, Arun Siluvery wrote:
> Cc: Ben Widawsky <benjamin.widawsky at intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
> Signed-off-by: Arun Siluvery <arun.siluvery at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h | 3 +++
>  drivers/gpu/drm/i915/intel_pm.c | 6 ++++++
>  2 files changed, 9 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 77967ca..8991cd5 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -6849,6 +6849,9 @@ enum skl_disp_power_wells {
>  #define GEN7_MISCCPCTL			(0x9424)
>  #define   GEN7_DOP_CLOCK_GATE_ENABLE	(1<<0)
>  
> +#define GEN8_GARBCNTL                   0xB004
> +#define   GEN9_GAPS_TSV_CREDIT_DISABLE  (1<<7)
> +
>  /* IVYBRIDGE DPF */
>  #define GEN7_L3CDERRST1			0xB008 /* L3CD Error Status 1 */
>  #define HSW_L3CDERRST11			0xB208 /* L3CD Error Status register 1 slice 1 */
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index c23cab6..9152113 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -106,6 +106,12 @@ static void skl_init_clock_gating(struct drm_device *dev)
>  		/* WaDisableLSQCROPERFforOCL:skl */
>  		I915_WRITE(GEN8_L3SQCREG4, I915_READ(GEN8_L3SQCREG4) |
>  			   GEN8_LQSC_RO_PERF_DIS);
> +
> +	/* WaEnableGapsTsvCreditFix:skl */
> +	if (IS_SKYLAKE(dev) && (INTEL_REVID(dev) >= SKL_REVID_C0)) {
> +		I915_WRITE(GEN8_GARBCNTL, (I915_READ(GEN8_GARBCNTL) |
> +					   GEN9_GAPS_TSV_CREDIT_DISABLE));
> +	}
>  }
>  
>  static void bxt_init_clock_gating(struct drm_device *dev)

FWIW, the docs make it sound like BIOS should be doing this. Did you verify we
actually don't have the bit set with more recent BKC?

Tested-by: Ben Widawsky <ben at bwidawsk.net>
Reviewed-by: Ben Widawsky <ben at bwidawsk.net>

-- 
Ben Widawsky, Intel Open Source Technology Center