[Intel-gfx] [PATCH v6 15/19] drm/i915: batch_obj vm offset must be u64
Daniel Vetter
daniel at ffwll.ch
Wed Aug 5 09:01:04 PDT 2015
On Wed, Jul 29, 2015 at 05:23:59PM +0100, Michel Thierry wrote:
> Otherwise it can overflow in 48-bit mode, and cause an incorrect
> exec_start.
>
> Before commit 5f19e2bffa63a91cd4ac1adcec648e14a44277ce ("drm/i915: Merged
> the many do_execbuf() parameters into a structure"), it was already an u64.
>
> Signed-off-by: Michel Thierry <michel.thierry at intel.com>
So we have a few more u64, but the i915_gem_obj_offset is still unsigned
long. Am I missing a patch?
-Daniel
> ---
> drivers/gpu/drm/i915/i915_drv.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 33926d9..ed2fbcd 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1674,7 +1674,7 @@ struct i915_execbuffer_params {
> struct drm_file *file;
> uint32_t dispatch_flags;
> uint32_t args_batch_start_offset;
> - uint32_t batch_obj_vm_offset;
> + uint64_t batch_obj_vm_offset;
> struct intel_engine_cs *ring;
> struct drm_i915_gem_object *batch_obj;
> struct intel_context *ctx;
> --
> 2.4.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
More information about the Intel-gfx
mailing list