[Intel-gfx] [PATCH] drm/i915/skl: Update DDI buffer translation programming.
Zhang, Xiong Y
xiong.y.zhang at intel.com
Wed Aug 5 18:46:59 PDT 2015
Hi, Vivi:
Do you think this patch could resolve the following two issues ?
https://bugs.freedesktop.org/show_bug.cgi?id=91050
https://bugs.freedesktop.org/show_bug.cgi?id=91269
thanks
> -----Original Message-----
> From: Intel-gfx [mailto:intel-gfx-bounces at lists.freedesktop.org] On Behalf Of
> Rodrigo Vivi
> Sent: Thursday, August 6, 2015 5:59 AM
> To: intel-gfx at lists.freedesktop.org
> Cc: Runyan, Arthur J; Vivi, Rodrigo
> Subject: [Intel-gfx] [PATCH] drm/i915/skl: Update DDI buffer translation
> programming.
>
> SKL-Y can now use the same programming for all VccIO values after an
> adjustment to I_boost.
> SKL-U DP table adjustments.
> 1. Remove SKL Y 0.95V from "SKL H and S" columns in all tables. The
> other SKL Y column removes the "0.85V VccIO" so it now applies to all
> voltages.
> 2. DP table changes SKL U 400mV+0db dword 0 value from 2016h to
> 201Bh.
> 3. DP table changes SKL U 600mv+0db dword 0 value from 2016h to
> 201Bh.
> 4. DP table increases I_boost to level 3 for SKL Y 400mv+9.5db.
>
> Reference: Graphics Spec Change r97962
> Cc: Arthur Runyan <arthur.j.runyan at intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 73 ++++++++++++++--------------------------
> 1 file changed, 25 insertions(+), 48 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> b/drivers/gpu/drm/i915/intel_ddi.c
> index 9a40bfb..9e5a21b 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -128,7 +128,7 @@ static const struct ddi_buf_trans
> bdw_ddi_translations_hdmi[] = {
> { 0x80FFFFFF, 0x001B0002, 0x0 },/* 9: 1000 1000 0 */
> };
>
> -/* Skylake H, S, and Skylake Y with 0.95V VccIO */
> +/* Skylake H and S */
> static const struct ddi_buf_trans skl_ddi_translations_dp[] = {
> { 0x00002016, 0x000000A0, 0x0 },
> { 0x00005012, 0x0000009B, 0x0 },
> @@ -143,23 +143,23 @@ static const struct ddi_buf_trans
> skl_ddi_translations_dp[] = {
>
> /* Skylake U */
> static const struct ddi_buf_trans skl_u_ddi_translations_dp[] = {
> - { 0x00002016, 0x000000A2, 0x0 },
> + { 0x0000201B, 0x000000A2, 0x0 },
> { 0x00005012, 0x00000088, 0x0 },
> { 0x00007011, 0x00000087, 0x0 },
> - { 0x80009010, 0x000000C7, 0x1 }, /* Uses I_boost */
> - { 0x00002016, 0x0000009D, 0x0 },
> + { 0x80009010, 0x000000C7, 0x1 }, /* Uses I_boost level 0x1 */
> + { 0x0000201B, 0x0000009D, 0x0 },
> { 0x00005012, 0x000000C7, 0x0 },
> { 0x00007011, 0x000000C7, 0x0 },
> { 0x00002016, 0x00000088, 0x0 },
> { 0x00005012, 0x000000C7, 0x0 },
> };
>
> -/* Skylake Y with 0.85V VccIO */
> -static const struct ddi_buf_trans skl_y_085v_ddi_translations_dp[] = {
> +/* Skylake Y */
> +static const struct ddi_buf_trans skl_y_ddi_translations_dp[] = {
> { 0x00000018, 0x000000A2, 0x0 },
> { 0x00005012, 0x00000088, 0x0 },
> { 0x00007011, 0x00000087, 0x0 },
> - { 0x80009010, 0x000000C7, 0x1 }, /* Uses I_boost */
> + { 0x80009010, 0x000000C7, 0x3 }, /* Uses I_boost level 0x3 */
> { 0x00000018, 0x0000009D, 0x0 },
> { 0x00005012, 0x000000C7, 0x0 },
> { 0x00007011, 0x000000C7, 0x0 },
> @@ -168,7 +168,7 @@ static const struct ddi_buf_trans
> skl_y_085v_ddi_translations_dp[] = { };
>
> /*
> - * Skylake H and S, and Skylake Y with 0.95V VccIO
> + * Skylake H and S
> * eDP 1.4 low vswing translation parameters
> */
> static const struct ddi_buf_trans skl_ddi_translations_edp[] = { @@ -202,10
> +202,10 @@ static const struct ddi_buf_trans skl_u_ddi_translations_edp[] =
> { };
>
> /*
> - * Skylake Y with 0.95V VccIO
> + * Skylake Y
> * eDP 1.4 low vswing translation parameters
> */
> -static const struct ddi_buf_trans skl_y_085v_ddi_translations_edp[] = {
> +static const struct ddi_buf_trans skl_y_ddi_translations_edp[] = {
> { 0x00000018, 0x000000A8, 0x0 },
> { 0x00004013, 0x000000AB, 0x0 },
> { 0x00007011, 0x000000A4, 0x0 },
> @@ -218,7 +218,7 @@ static const struct ddi_buf_trans
> skl_y_085v_ddi_translations_edp[] = {
> { 0x00000018, 0x0000008A, 0x0 },
> };
>
> -/* Skylake H, S and U, and Skylake Y with 0.95V VccIO */
> +/* Skylake U, H and S */
> static const struct ddi_buf_trans skl_ddi_translations_hdmi[] = {
> { 0x00000018, 0x000000AC, 0x0 },
> { 0x00005012, 0x0000009D, 0x0 },
> @@ -233,8 +233,8 @@ static const struct ddi_buf_trans
> skl_ddi_translations_hdmi[] = {
> { 0x00000018, 0x000000C7, 0x0 },
> };
>
> -/* Skylake Y with 0.85V VccIO */
> -static const struct ddi_buf_trans skl_y_085v_ddi_translations_hdmi[] = {
> +/* Skylake Y */
> +static const struct ddi_buf_trans skl_y_ddi_translations_hdmi[] = {
> { 0x00000018, 0x000000A1, 0x0 },
> { 0x00005012, 0x000000DF, 0x0 },
> { 0x00007011, 0x00000084, 0x0 },
> @@ -244,7 +244,7 @@ static const struct ddi_buf_trans
> skl_y_085v_ddi_translations_hdmi[] = {
> { 0x00006013, 0x000000C7, 0x0 },
> { 0x00000018, 0x0000008A, 0x0 },
> { 0x00003015, 0x000000C7, 0x0 }, /* Default */
> - { 0x80003015, 0x000000C7, 0x7 }, /* Uses I_boost */
> + { 0x80003015, 0x000000C7, 0x7 }, /* Uses I_boost level 0x7 */
> { 0x00000018, 0x000000C7, 0x0 },
> };
>
> @@ -337,17 +337,10 @@ static const struct ddi_buf_trans
> *skl_get_buf_trans_dp(struct drm_device *dev, {
> struct drm_i915_private *dev_priv = dev->dev_private;
> const struct ddi_buf_trans *ddi_translations;
> - static int is_095v = -1;
>
> - if (is_095v == -1) {
> - u32 spr1 = I915_READ(UAIMI_SPR1);
> -
> - is_095v = spr1 & SKL_VCCIO_MASK;
> - }
> -
> - if (IS_SKL_ULX(dev) && !is_095v) {
> - ddi_translations = skl_y_085v_ddi_translations_dp;
> - *n_entries = ARRAY_SIZE(skl_y_085v_ddi_translations_dp);
> + if (IS_SKL_ULX(dev)) {
> + ddi_translations = skl_y_ddi_translations_dp;
> + *n_entries = ARRAY_SIZE(skl_y_ddi_translations_dp);
> } else if (IS_SKL_ULT(dev)) {
> ddi_translations = skl_u_ddi_translations_dp;
> *n_entries = ARRAY_SIZE(skl_u_ddi_translations_dp);
> @@ -364,23 +357,14 @@ static const struct ddi_buf_trans
> *skl_get_buf_trans_edp(struct drm_device *dev, {
> struct drm_i915_private *dev_priv = dev->dev_private;
> const struct ddi_buf_trans *ddi_translations;
> - static int is_095v = -1;
>
> - if (is_095v == -1) {
> - u32 spr1 = I915_READ(UAIMI_SPR1);
> -
> - is_095v = spr1 & SKL_VCCIO_MASK;
> - }
> -
> - if (IS_SKL_ULX(dev) && !is_095v) {
> + if (IS_SKL_ULX(dev)) {
> if (dev_priv->edp_low_vswing) {
> - ddi_translations = skl_y_085v_ddi_translations_edp;
> - *n_entries =
> - ARRAY_SIZE(skl_y_085v_ddi_translations_edp);
> + ddi_translations = skl_y_ddi_translations_edp;
> + *n_entries = ARRAY_SIZE(skl_y_ddi_translations_edp);
> } else {
> - ddi_translations = skl_y_085v_ddi_translations_dp;
> - *n_entries =
> - ARRAY_SIZE(skl_y_085v_ddi_translations_dp);
> + ddi_translations = skl_y_ddi_translations_dp;
> + *n_entries = ARRAY_SIZE(skl_y_ddi_translations_dp);
> }
> } else if (IS_SKL_ULT(dev)) {
> if (dev_priv->edp_low_vswing) {
> @@ -409,17 +393,10 @@ skl_get_buf_trans_hdmi(struct drm_device *dev, {
> struct drm_i915_private *dev_priv = dev->dev_private;
> const struct ddi_buf_trans *ddi_translations;
> - static int is_095v = -1;
> -
> - if (is_095v == -1) {
> - u32 spr1 = I915_READ(UAIMI_SPR1);
> -
> - is_095v = spr1 & SKL_VCCIO_MASK;
> - }
>
> - if (IS_SKL_ULX(dev) && !is_095v) {
> - ddi_translations = skl_y_085v_ddi_translations_hdmi;
> - *n_entries = ARRAY_SIZE(skl_y_085v_ddi_translations_hdmi);
> + if (IS_SKL_ULX(dev)) {
> + ddi_translations = skl_y_ddi_translations_hdmi;
> + *n_entries = ARRAY_SIZE(skl_y_ddi_translations_hdmi);
> } else {
> ddi_translations = skl_ddi_translations_hdmi;
> *n_entries = ARRAY_SIZE(skl_ddi_translations_hdmi);
> --
> 2.1.0
>
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