[Intel-gfx] [PATCH] drm/i915: Check idle to active before processing CSQ

[Siluvery, Arun]

On 07/08/2015 12:52, Daniel Vetter wrote:
> On Fri, Aug 07, 2015 at 11:15:56AM +0300, Mika Kuoppala wrote:
>> Daniel Vetter <daniel at ffwll.ch> writes:
>>
>>> On Thu, Aug 06, 2015 at 05:09:17PM +0300, Mika Kuoppala wrote:
>>>> If idle to active bit is set, the rest of the fields
>>>> in CSQ are not valid.
>>>>
>>>> Bail out early if this is the case in order to prevent
>>>> rest of the loop inspecting stale values.
>>>>
>>>> Signed-off-by: Mika Kuoppala <mika.kuoppala at intel.com>
>>>

looks good to me, didn't observe any impact with this patch.
Reviewed-by: Arun Siluvery <arun.siluvery at linux.intel.com>

regards
Arun

>>> Same questions here too, what's the impact. E.g. if you only found this by
>>> bspec/code inspection then it's for -next, but if it's to fix some known
>>> breakage then it's for -fixes + cc: stable.
>>>
>>
>> To this and the masked write one: Both of these were found
>> when I was trying to find out root cause for skl hangs.
>>
>> They are both for -next. Both are in the correctness
>> department vrt bspec and I haven't observed any other
>> impact.
>>
>> Point taken on being more verbose.
>
> Thanks I added a note about this to the first patch and merged it. This
> one here still seems to miss an r-b.
> -Daniel
>