[Intel-gfx] [PATCH 07/16] drm/i915: disable FBC on FIFO underruns
Daniel Vetter
daniel at ffwll.ch
Wed Aug 26 00:36:13 PDT 2015
On Thu, Aug 20, 2015 at 06:00:02PM +0300, Ville Syrjälä wrote:
> On Thu, Aug 20, 2015 at 11:29:29AM -0300, Paulo Zanoni wrote:
> > 2015-08-20 10:58 GMT-03:00 Ville Syrjälä <ville.syrjala at linux.intel.com>:
> > > Once it's otherwise known to be solid,
> > > then it might make sense, although a much cooler thing would be if we
> > > could actually detect when the display has failed entirely and recover
> > > it somehow.
> > >
> > > Oh and to make the protection mechanism actually kick in reliably you
> > > would somehow need to address the problems with the underrun interrupts.
> >
> > Which problems?
>
> The fact that we disable them as soon as one occurs, and even worse the
> error interrupt is a shared one on many platforms, so one underrun any
> pipe or some other unrelated error kills underrun detection everywhere.
E.g. on hsw with vga + hdmi/dp (which now happens easily since igt creates
a fake vga output, just run kms_pipe_crc_basic) underruns happen reliably
on modeset and then don't work anywhere. We also seem to fail to restore
them somehow :(
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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