[Intel-gfx] [PATCH 06/11] drm/i915: Use cached cdclk_freq for PWM calculations

Jani Nikula jani.nikula at linux.intel.com
Tue Dec 1 04:37:04 PST 2015


On Mon, 30 Nov 2015, ville.syrjala at linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> No need to read out cdclk from the hardware, we have it already
> cached in dev_priv.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula at intel.com>


> ---
>  drivers/gpu/drm/i915/intel_panel.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
> index d4b18b56f3ca..891a587225e2 100644
> --- a/drivers/gpu/drm/i915/intel_panel.c
> +++ b/drivers/gpu/drm/i915/intel_panel.c
> @@ -1337,7 +1337,7 @@ static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
>  	if (IS_PINEVIEW(dev))
>  		clock = MHz(intel_hrawclk(dev));
>  	else
> -		clock = 1000 * dev_priv->display.get_display_clock_speed(dev);
> +		clock = 1000 * dev_priv->cdclk_freq;
>  
>  	return clock / (pwm_freq_hz * 32);
>  }
> @@ -1356,7 +1356,7 @@ static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
>  	if (IS_G4X(dev_priv))
>  		clock = MHz(intel_hrawclk(dev));
>  	else
> -		clock = 1000 * dev_priv->display.get_display_clock_speed(dev);
> +		clock = 1000 * dev_priv->cdclk_freq;
>  
>  	return clock / (pwm_freq_hz * 128);
>  }

-- 
Jani Nikula, Intel Open Source Technology Center


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